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author | Stephen Boyd <sboyd@codeaurora.org> | 2015-01-29 15:38:12 -0800 |
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committer | Michael Turquette <mturquette@linaro.org> | 2015-02-25 12:08:39 -0800 |
commit | 84b919fdb8559a8cd5432d8fa0002219df59cb32 (patch) | |
tree | 807e1a1081c4bc56544cbf7dfc6fe4a3e3c6db9b /drivers/clk/qcom/gcc-msm8960.c | |
parent | 7dd47b8ef54c301ecde58cecf2f3e29ff3f48d4a (diff) |
clk: qcom: lcc-msm8960: Fix PLL rate detection
regmap_read() returns 0 on success, not the value of the register
that is read. Fix it so we properly detect the frequency plan.
Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock
controller (LCC) driver"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-msm8960.c')
0 files changed, 0 insertions, 0 deletions