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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2021-01-18 09:41:54 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-02-08 09:46:23 -0800 |
| commit | ee778e069dd49cf476f3939d62f31346cf730080 (patch) | |
| tree | ee3ba32f487d6d360bb678399c1e79742dadc351 /drivers/clk/qcom | |
| parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
dt-bindings: clock: Add Qualcomm A7 PLL binding
Add devicetree YAML binding for Cortex A7 PLL clock in Qualcomm
platforms like SDX55.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118041156.50016-4-manivannan.sadhasivam@linaro.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom')
0 files changed, 0 insertions, 0 deletions