diff options
| author | Stephen Boyd <sboyd@kernel.org> | 2020-11-27 12:19:48 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-11-27 12:19:48 -0800 |
| commit | 55cd03e8095d46c5cc4b72e71af7ea3e34eb3c2f (patch) | |
| tree | 6a164b3a6b6925b5a94b3044f9502a00be5a750d /drivers/clk/tegra | |
| parent | 3650b228f83adda7e5ee532e2b90429c03f7b9ec (diff) | |
| parent | a886c310d9fcb0e66253d4af225cba13f9bdf5d2 (diff) | |
Merge tag 'for-5.11-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-tegra
Pull a couple Tegra clk driver updates from Thierry Reding:
This set consists of two fixes for minor issues that rarely, if ever,
happen, so not urgent enough for these to go into v5.10.
* tag 'for-5.11-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
clk: tegra: bpmp: Clamp clock rates on requests
clk: tegra: Do not return 0 on failure
Diffstat (limited to 'drivers/clk/tegra')
| -rw-r--r-- | drivers/clk/tegra/clk-bpmp.c | 6 | ||||
| -rw-r--r-- | drivers/clk/tegra/clk-dfll.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c index a66263b6490d..6ecf18f71c32 100644 --- a/drivers/clk/tegra/clk-bpmp.c +++ b/drivers/clk/tegra/clk-bpmp.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2016 NVIDIA Corporation + * Copyright (C) 2016-2020 NVIDIA Corporation */ #include <linux/clk-provider.h> @@ -174,7 +174,7 @@ static long tegra_bpmp_clk_round_rate(struct clk_hw *hw, unsigned long rate, int err; memset(&request, 0, sizeof(request)); - request.rate = rate; + request.rate = min_t(u64, rate, S64_MAX); memset(&msg, 0, sizeof(msg)); msg.cmd = CMD_CLK_ROUND_RATE; @@ -256,7 +256,7 @@ static int tegra_bpmp_clk_set_rate(struct clk_hw *hw, unsigned long rate, struct tegra_bpmp_clk_message msg; memset(&request, 0, sizeof(request)); - request.rate = rate; + request.rate = min_t(u64, rate, S64_MAX); memset(&msg, 0, sizeof(msg)); msg.cmd = CMD_CLK_SET_RATE; diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c index cfbaa90c7adb..a5f526bb0483 100644 --- a/drivers/clk/tegra/clk-dfll.c +++ b/drivers/clk/tegra/clk-dfll.c @@ -1856,13 +1856,13 @@ static int dfll_fetch_pwm_params(struct tegra_dfll *td) &td->reg_init_uV); if (!ret) { dev_err(td->dev, "couldn't get initialized voltage\n"); - return ret; + return -EINVAL; } ret = read_dt_param(td, "nvidia,pwm-period-nanoseconds", &pwm_period); if (!ret) { dev_err(td->dev, "couldn't get PWM period\n"); - return ret; + return -EINVAL; } td->pwm_rate = (NSEC_PER_SEC / pwm_period) * (MAX_DFLL_VOLTAGES - 1); |