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author | Bjorn Helgaas <bhelgaas@google.com> | 2021-05-04 10:43:28 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2021-05-04 10:43:28 -0500 |
commit | 98d771eb3df23207d671a9efb1160c018ab8e492 (patch) | |
tree | e2f63749bb4421f3452cb698216e6623bb2d4236 /drivers/fpga/zynq-fpga.c | |
parent | 180594f55f69d3f64a8f67832867845de2018684 (diff) | |
parent | ae80d514808557018e44190fdbab23564a51e9ef (diff) |
Merge branch 'remotes/lorenzo/pci/risc-v'
- sifive: Add pcie_aux clock to prci driver (Greentime Hu)
- sifive: Use reset-simple in prci driver for PCIe (Greentime Hu)
- Add SiFive FU740 PCIe host controller driver and DT binding (Paul
Walmsley, Greentime Hu)
* remotes/lorenzo/pci/risc-v:
riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC
PCI: fu740: Add SiFive FU740 PCIe host controller driver
dt-bindings: PCI: Add SiFive FU740 PCIe host controller
MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver
clk: sifive: Use reset-simple in prci driver for PCIe driver
clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
Diffstat (limited to 'drivers/fpga/zynq-fpga.c')
0 files changed, 0 insertions, 0 deletions