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authorWenhui Sheng <Wenhui.Sheng@amd.com>2020-07-10 17:39:24 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-15 12:41:32 -0400
commitea8139d8d59bd6f014b317e7423345169a56fe49 (patch)
tree5bf10243713474fab8ad722bcfccaacc22c027d8 /drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
parenta4497974ed339985fa89fabde9d5f6038bf1a59e (diff)
drm/amd/powerplay: add SMU mode1 reset
From PM FW 58.26.0 for sienna cichlid, SMU mode1 reset is support, driver sends PPSMC_MSG_Mode1Reset message to PM FW could trigger this reset. v2: add mode1 reset dpm interface v3: change maro name Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 6a8aae70a0e6..7f3cd7185650 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -529,6 +529,9 @@ int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev);
bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);
+bool amdgpu_dpm_is_mode1_reset_supported(struct amdgpu_device *adev);
+int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);
+
int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,
enum pp_mp1_state mp1_state);