diff options
| author | yipechai <YiPeng.Chai@amd.com> | 2022-02-08 10:48:56 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-02-14 15:08:41 -0500 |
| commit | 80ed77f971c3911d6a6f7c537540b4ee62859455 (patch) | |
| tree | 1856844c2d9cf55649783fe33487507b85f86483 /drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c | |
| parent | cb9561d0e3f4393a31fab2034c33c6cf2162513a (diff) | |
drm/amdgpu: Optimize amdgpu_nbio_ras_late_init/amdgpu_nbio_ras_fini function code
Optimize amdgpu_nbio_ras_late_init/amdgpu_nbio_ras_fini function code.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c | 40 |
1 files changed, 5 insertions, 35 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c index 6ace2e390e77..89e61fdd3580 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c @@ -25,26 +25,9 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, void *ras_info) { int r; - struct ras_ih_if ih_info = { - .cb = NULL, - }; - struct ras_fs_if fs_info = { - .sysfs_name = "pcie_bif_err_count", - }; - - if (!adev->nbio.ras_if) { - adev->nbio.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); - if (!adev->nbio.ras_if) - return -ENOMEM; - adev->nbio.ras_if->block = AMDGPU_RAS_BLOCK__PCIE_BIF; - adev->nbio.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; - adev->nbio.ras_if->sub_block_index = 0; - } - ih_info.head = fs_info.head = *adev->nbio.ras_if; - r = amdgpu_ras_late_init(adev, adev->nbio.ras_if, - &fs_info, &ih_info); + r = amdgpu_ras_block_late_init(adev, adev->nbio.ras_if); if (r) - goto free; + return r; if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) { r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0); @@ -53,30 +36,17 @@ int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, void *ras_info) r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); if (r) goto late_fini; - } else { - r = 0; - goto free; } return 0; late_fini: - amdgpu_ras_late_fini(adev, adev->nbio.ras_if, &ih_info); -free: - kfree(adev->nbio.ras_if); - adev->nbio.ras_if = NULL; + amdgpu_ras_block_late_fini(adev, adev->nbio.ras_if); return r; } void amdgpu_nbio_ras_fini(struct amdgpu_device *adev) { if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF) && - adev->nbio.ras_if) { - struct ras_common_if *ras_if = adev->nbio.ras_if; - struct ras_ih_if ih_info = { - .cb = NULL, - }; - - amdgpu_ras_late_fini(adev, ras_if, &ih_info); - kfree(ras_if); - } + adev->nbio.ras_if) + amdgpu_ras_block_late_fini(adev, adev->nbio.ras_if); } |