diff options
| author | Likun Gao <Likun.Gao@amd.com> | 2021-09-01 15:25:51 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-04 10:43:53 -0400 |
| commit | 6777c8cfcace139822f645c59102d556c541d6d4 (patch) | |
| tree | e06bd32fc34a0a4c1b6b3d98236144a6e15d1346 /drivers/gpu/drm/amd/amdgpu | |
| parent | 8e41a56a79a74e5bb99628231c21dd902b8badc4 (diff) | |
drm/amdgpu: support for new SDMA front door load
Support for SDMA v6_0 ucode front door load.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 12 |
2 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index aa86f8ae424a..dfb778cd2f82 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2199,6 +2199,12 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode, case AMDGPU_UCODE_ID_DMCUB: *type = GFX_FW_TYPE_DMUB; break; + case AMDGPU_UCODE_ID_SDMA_UCODE_TH0: + *type = GFX_FW_TYPE_SDMA_UCODE_TH0; + break; + case AMDGPU_UCODE_ID_SDMA_UCODE_TH1: + *type = GFX_FW_TYPE_SDMA_UCODE_TH1; + break; case AMDGPU_UCODE_ID_MAXIMUM: default: return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c index 4d3d14bcfb82..adf17bdddb65 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c @@ -648,6 +648,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, const struct dmcu_firmware_header_v1_0 *dmcu_hdr = NULL; const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL; const struct mes_firmware_header_v1_0 *mes_hdr = NULL; + const struct sdma_firmware_header_v2_0 *sdma_hdr = NULL; u8 *ucode_addr; if (NULL == ucode->fw) @@ -664,9 +665,20 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, dmcu_hdr = (const struct dmcu_firmware_header_v1_0 *)ucode->fw->data; dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data; mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data; + sdma_hdr = (const struct sdma_firmware_header_v2_0 *)ucode->fw->data; if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) { switch (ucode->ucode_id) { + case AMDGPU_UCODE_ID_SDMA_UCODE_TH0: + ucode->ucode_size = le32_to_cpu(sdma_hdr->ctx_jt_offset + sdma_hdr->ctx_jt_size); + ucode_addr = (u8 *)ucode->fw->data + + le32_to_cpu(sdma_hdr->header.ucode_array_offset_bytes); + break; + case AMDGPU_UCODE_ID_SDMA_UCODE_TH1: + ucode->ucode_size = le32_to_cpu(sdma_hdr->ctl_jt_offset + sdma_hdr->ctl_jt_size); + ucode_addr = (u8 *)ucode->fw->data + + le32_to_cpu(sdma_hdr->ctl_ucode_offset); + break; case AMDGPU_UCODE_ID_CP_MEC1: case AMDGPU_UCODE_ID_CP_MEC2: ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - |