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authorPhilipp Zabel <p.zabel@pengutronix.de>2017-02-24 18:23:55 +0100
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-03-15 15:28:27 +0100
commitf9bb7acb9b19a40dbd9d1b89380335dc8e23925f (patch)
tree78337336d19efb7429f18eb8b88102c31c6007de /drivers/gpu/drm/imx/ipuv3-plane.c
parent2212a780b9c515cd54a5707713307efab9896b4f (diff)
gpu: ipu-v3: add unsynchronised DP channel disabling
When disabling the foreground DP channel during a modeset, the DC is already disabled without waiting for end of frame. There is no reason to wait for a frame boundary before updating the DP registers in that case. Add support to apply updates immediately. No functional changes, yet. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Diffstat (limited to 'drivers/gpu/drm/imx/ipuv3-plane.c')
-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index 24819c9c3640..55991d46ced5 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -181,7 +181,7 @@ static int ipu_disable_plane(struct drm_plane *plane)
ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
if (ipu_plane->dp)
- ipu_dp_disable_channel(ipu_plane->dp);
+ ipu_dp_disable_channel(ipu_plane->dp, true);
ipu_idmac_disable_channel(ipu_plane->ipu_ch);
ipu_dmfc_disable_channel(ipu_plane->dmfc);
if (ipu_plane->dp)