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authorDave Airlie <airlied@redhat.com>2021-12-29 14:02:10 +1000
committerDave Airlie <airlied@redhat.com>2021-12-29 14:02:44 +1000
commit2b534e90a1e31c7fc9536b512b72274cc3575f4c (patch)
treef98205ccbc118d7f4e3811b1bbc11ff0eeedf80d /drivers/gpu/drm/msm/dsi/dsi.h
parent040bf2a9446f6ba267225d34dc4a9b14d11e5092 (diff)
parent6ed95285382d6f90a3c3a11d5806a5eb7db715c3 (diff)
Merge tag 'drm-msm-next-2021-12-26' of ssh://gitlab.freedesktop.org/drm/msm into drm-next
* dpu plane state cleanup in prep for multirect * dpu debugfs cleanup (and moving things to atomic_print_state) in prep for multirect * dp support for sc7280 * struct_mutex removal * include more GMU state in gpu devcore dumps * add support for a506 * remove old eDP sub-driver (never was used in any upstream supported devices and modern things with eDP will use DP sub-driver instead) * debugfs to disable hw gpu hang detect for (igt tests) * debugfs for dumping display hw state * and the usual assortment of cleanup and bug fixes There still seems to be a timing issue with dpu, showing up on sc7180 devices, after the bridge probe-order change. Ie. things work great if loglevel is high enough (or enough debug options are enabled, etc). We'll continue to debug this in the new year. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rob Clark <robdclark@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGs+vwr0nkwgYzuYAsCoHtypWpWav+yVvLZGsEJy8tJ56A@mail.gmail.com
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi.h')
-rw-r--r--drivers/gpu/drm/msm/dsi/dsi.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index bb39e7ca802d..c8dedc95428c 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -82,7 +82,6 @@ int msm_dsi_manager_cmd_xfer(int id, const struct mipi_dsi_msg *msg);
bool msm_dsi_manager_cmd_xfer_trigger(int id, u32 dma_base, u32 len);
int msm_dsi_manager_register(struct msm_dsi *msm_dsi);
void msm_dsi_manager_unregister(struct msm_dsi *msm_dsi);
-bool msm_dsi_manager_validate_current_config(u8 id);
void msm_dsi_manager_tpg_enable(void);
/* msm dsi */
@@ -120,6 +119,8 @@ unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host);
struct drm_bridge *msm_dsi_host_get_bridge(struct mipi_dsi_host *host);
int msm_dsi_host_register(struct mipi_dsi_host *host);
void msm_dsi_host_unregister(struct mipi_dsi_host *host);
+void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host,
+ struct msm_dsi_phy *src_phy);
int msm_dsi_host_set_src_pll(struct mipi_dsi_host *host,
struct msm_dsi_phy *src_phy);
void msm_dsi_host_reset_phy(struct mipi_dsi_host *host);
@@ -173,8 +174,6 @@ int msm_dsi_phy_enable(struct msm_dsi_phy *phy,
void msm_dsi_phy_disable(struct msm_dsi_phy *phy);
void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
enum msm_dsi_phy_usecase uc);
-int msm_dsi_phy_get_clk_provider(struct msm_dsi_phy *phy,
- struct clk **byte_clk_provider, struct clk **pixel_clk_provider);
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy);
int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy);
void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct msm_dsi_phy *phy);