diff options
| author | Mathieu Poirier <mathieu.poirier@linaro.org> | 2016-05-03 11:33:54 -0600 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-05-03 14:59:30 -0700 |
| commit | f2facc3366d77e78dbc8bf865f1e4a6227a7f0e5 (patch) | |
| tree | b5c0639e99149f1312344e8f0f18b7cebf55eff0 /drivers/hwtracing/coresight/coresight-tmc-etf.c | |
| parent | f74debbea0885ebb65fb3fa4e598323f40b03f5f (diff) | |
coresight: tmc: adding mode of operation for link/sinks
Moving tmc_drvdata::enable to a local_t mode. That way the
sink interface is aware of it's orgin and the foundation for
mutual exclusion between the sysFS and Perf interface can be
laid out.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/coresight/coresight-tmc-etf.c')
| -rw-r--r-- | drivers/hwtracing/coresight/coresight-tmc-etf.c | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 60edf4d1968f..bc0efc1e5b49 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -111,6 +111,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) int ret = 0; bool used = false; char *buf = NULL; + long val; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -140,6 +141,15 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) goto out; } + val = local_xchg(&drvdata->mode, mode); + /* + * In sysFS mode we can have multiple writers per sink. Since this + * sink is already enabled no memory is needed and the HW need not be + * touched. + */ + if (val == CS_MODE_SYSFS) + goto out; + /* * If drvdata::buf isn't NULL, memory was allocated for a previous * trace run but wasn't read. If so simply zero-out the memory. @@ -157,7 +167,6 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) } tmc_etb_enable_hw(drvdata); - drvdata->enable = true; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); @@ -173,6 +182,7 @@ out: static void tmc_disable_etf_sink(struct coresight_device *csdev) { + long val; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -182,8 +192,11 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) return; } - tmc_etb_disable_hw(drvdata); - drvdata->enable = false; + val = local_xchg(&drvdata->mode, CS_MODE_DISABLED); + /* Disable the TMC only if it needs to */ + if (val != CS_MODE_DISABLED) + tmc_etb_disable_hw(drvdata); + spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n"); @@ -202,7 +215,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, } tmc_etf_enable_hw(drvdata); - drvdata->enable = true; + local_set(&drvdata->mode, CS_MODE_SYSFS); spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC-ETF enabled\n"); @@ -222,7 +235,7 @@ static void tmc_disable_etf_link(struct coresight_device *csdev, } tmc_etf_disable_hw(drvdata); - drvdata->enable = false; + local_set(&drvdata->mode, CS_MODE_DISABLED); spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC disabled\n"); @@ -279,7 +292,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) } /* Disable the TMC if need be */ - if (drvdata->enable) + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) tmc_etb_disable_hw(drvdata); drvdata->reading = true; @@ -310,7 +323,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) } /* Re-enable the TMC if need be */ - if (drvdata->enable) { + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { /* * The trace run will continue with the same allocated trace * buffer. As such zero-out the buffer so that we don't end |