diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-06-03 13:00:02 +0300 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-06-15 22:07:10 +0100 |
| commit | 6531f3a41fe890fd633dd132cd69878b4d699fcc (patch) | |
| tree | 39200c28d2cb921a3873aed498f4a8187135f25e /drivers/iio/adc | |
| parent | 2d27a021395e200b13d55ad29c34ec62a8ba1c60 (diff) | |
iio: adc: meson_saradc: Use devm_clk_get_optional()
Replace open coded variants of devm_clk_get_optional().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20220603100004.70336-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
| -rw-r--r-- | drivers/iio/adc/meson_saradc.c | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index 0d9aef362c5d..337517a8e1ac 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -1222,23 +1222,13 @@ static int meson_sar_adc_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, PTR_ERR(priv->core_clk), "failed to get core clk\n"); - priv->adc_clk = devm_clk_get(&pdev->dev, "adc_clk"); - if (IS_ERR(priv->adc_clk)) { - if (PTR_ERR(priv->adc_clk) == -ENOENT) - priv->adc_clk = NULL; - else - return dev_err_probe(&pdev->dev, PTR_ERR(priv->adc_clk), - "failed to get adc clk\n"); - } + priv->adc_clk = devm_clk_get_optional(dev, "adc_clk"); + if (IS_ERR(priv->adc_clk)) + return dev_err_probe(dev, PTR_ERR(priv->adc_clk), "failed to get adc clk\n"); - priv->adc_sel_clk = devm_clk_get(&pdev->dev, "adc_sel"); - if (IS_ERR(priv->adc_sel_clk)) { - if (PTR_ERR(priv->adc_sel_clk) == -ENOENT) - priv->adc_sel_clk = NULL; - else - return dev_err_probe(&pdev->dev, PTR_ERR(priv->adc_sel_clk), - "failed to get adc_sel clk\n"); - } + priv->adc_sel_clk = devm_clk_get_optional(dev, "adc_sel"); + if (IS_ERR(priv->adc_sel_clk)) + return dev_err_probe(dev, PTR_ERR(priv->adc_sel_clk), "failed to get adc_sel clk\n"); /* on pre-GXBB SoCs the SAR ADC itself provides the ADC clock: */ if (!priv->adc_clk) { |