diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2022-07-20 11:26:16 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-08-01 15:34:17 -0500 |
| commit | 6213c6c545cb273510047df881230d855e474d3b (patch) | |
| tree | a92588eda9c44966c06df2493139ca8b86479417 /drivers/pci | |
| parent | 13f8f3d1e369f56dfaeea10a2238d56bc36c876c (diff) | |
PCI: imx6: Support more than Gen2 speed link mode
Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up to
Gen3 link speed.
Link: https://lore.kernel.org/r/1658287576-26908-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index d11032388d23..6e5debdbc55b 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -844,12 +844,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) if (ret) goto err_reset_phy; - if (pci->link_gen == 2) { - /* Allow Gen2 mode after the link is up. */ + if (pci->link_gen > 1) { + /* Allow faster modes after the link is up */ dw_pcie_dbi_ro_wr_en(pci); tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); tmp &= ~PCI_EXP_LNKCAP_SLS; - tmp |= PCI_EXP_LNKCAP_SLS_5_0GB; + tmp |= pci->link_gen; dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); /* @@ -884,7 +884,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) if (ret) goto err_reset_phy; } else { - dev_info(dev, "Link: Gen2 disabled\n"); + dev_info(dev, "Link: Only Gen1 is enabled\n"); } imx6_pcie->link_is_up = true; |