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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2021-01-15 21:28:51 +0200
committerJakub Kicinski <kuba@kernel.org>2021-01-19 17:32:34 -0800
commit39fd0547ee66669479c05b86b65bbca9a16af5f0 (patch)
treec6916a2d978b00b16273c0b7a2ae9d12d166cb81 /drivers/powercap
parented569ed9b30a748f4e5601041a999a537bb5e736 (diff)
net: ethernet: ti: am65-cpsw-nuss: Support for transparent ASEL handling
Use the glue layer's functions to convert the dma_addr_t to and from CPPI5 address (with the ASEL bits), which should be used within the descriptors and data buffers. - Per channel coherency support The DMAs use the 'ASEL' bits to select data and configuration fetch path. The ASEL bits are placed at the unused parts of any address field used by the DMAs (pointers to descriptors, addresses in descriptors, ring base addresses). The ASEL is not part of the address (the DMAs can address 48bits). Individual channels can be configured to be coherent (via ACP port) or non coherent individually by configuring the ASEL to appropriate value. [1] https://lore.kernel.org/patchwork/cover/1350756/ Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Co-developed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/powercap')
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