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authorkxie@chelsio.com <kxie@chelsio.com>2010-08-16 20:55:53 -0700
committerJames Bottomley <James.Bottomley@suse.de>2010-09-05 14:29:07 -0300
commit7b36b6e03b0d6cee0948593a6a11841a457695b9 (patch)
tree6f68fa74acde025eb0759ada09b89697d61c5f54 /drivers/scsi/cxgbi/cxgb4i/cxgb4i.h
parent9ba682f01e2ffe47e6ea47fcc6cdfe39d7a71571 (diff)
[SCSI] cxgb4i v5: iscsi driver
Added cxgb4i iSCSI driver. This patch implements the cxgb4i iscsi connection acceleration for the open-iscsi initiator. The cxgb4i driver offers the iscsi PDU based offload: - digest insertion and verification - payload direct-placement into host memory buffer. Signed-off-by: Karen Xie <kxie@chelsio.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Diffstat (limited to 'drivers/scsi/cxgbi/cxgb4i/cxgb4i.h')
-rw-r--r--drivers/scsi/cxgbi/cxgb4i/cxgb4i.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/scsi/cxgbi/cxgb4i/cxgb4i.h b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.h
new file mode 100644
index 000000000000..342263b1f542
--- /dev/null
+++ b/drivers/scsi/cxgbi/cxgb4i/cxgb4i.h
@@ -0,0 +1,38 @@
+/*
+ * cxgb4i.h: Chelsio T4 iSCSI driver.
+ *
+ * Copyright (c) 2010 Chelsio Communications, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation.
+ *
+ * Written by: Karen Xie (kxie@chelsio.com)
+ * Written by: Rakesh Ranjan (rranjan@chelsio.com)
+ */
+
+#ifndef __CXGB4I_H__
+#define __CXGB4I_H__
+
+#define CXGB4I_SCSI_HOST_QDEPTH 1024
+#define CXGB4I_MAX_CONN 16384
+#define CXGB4I_MAX_TARGET CXGB4I_MAX_CONN
+#define CXGB4I_MAX_LUN 0x1000
+
+/* for TX: a skb must have a headroom of at least TX_HEADER_LEN bytes */
+#define CXGB4I_TX_HEADER_LEN \
+ (sizeof(struct fw_ofld_tx_data_wr) + sizeof(struct sge_opaque_hdr))
+
+struct cpl_rx_data_ddp {
+ union opcode_tid ot;
+ __be16 urg;
+ __be16 len;
+ __be32 seq;
+ union {
+ __be32 nxt_seq;
+ __be32 ddp_report;
+ };
+ __be32 ulp_crc;
+ __be32 ddpvld;
+};
+#endif /* __CXGB4I_H__ */