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authorJoerg Roedel <jroedel@suse.de>2020-07-22 15:30:36 +0200
committerJoerg Roedel <jroedel@suse.de>2020-07-22 15:30:36 +0200
commitee79e5fbc19c3b3910f80d80adb19fa49f908a3b (patch)
treee496fdc6d7d3fdadd6ba30bd7cff5b4258725e44 /include/linux/iommu.h
parent9ebcfadb0610322ac537dd7aa5d9cbc2b2894c68 (diff)
parentaa7ec73297df57a86308fee78d2bf86e22ea0bae (diff)
Merge tag 'arm-smmu-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/smmu
Arm SMMU updates for 5.9 - Support for SMMU-500 implementation in Marvell Armada-AP806 SoC - Support for SMMU-500 implementation in NVIDIA Tegra194 SoC - DT compatible string updates - Remove unused IOMMU_SYS_CACHE_ONLY flag
Diffstat (limited to 'include/linux/iommu.h')
-rw-r--r--include/linux/iommu.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 5f0b7859d2eb..bee1a8fa1fb1 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -31,12 +31,6 @@
* if the IOMMU page table format is equivalent.
*/
#define IOMMU_PRIV (1 << 5)
-/*
- * Non-coherent masters can use this page protection flag to set cacheable
- * memory attributes for only a transparent outer level of cache, also known as
- * the last-level or system cache.
- */
-#define IOMMU_SYS_CACHE_ONLY (1 << 6)
struct iommu_ops;
struct iommu_group;