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| author | Chen-Yu Tsai <wens@csie.org> | 2017-05-31 15:58:22 +0800 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@csie.org> | 2017-06-03 10:04:48 +0800 |
| commit | 77125a701adb21bfc03a2af211f472f8b490a084 (patch) | |
| tree | 1c7dd20d2c1ab0871237e61dbc47a02e8fb62af6 /lib/clz_ctz.c | |
| parent | 623d8c095cb3351564d4dd8e3b449163a07cbd47 (diff) | |
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of
its parents.
This adds the reference in the device tree describing this relationship.
This patch uses a raw number for the clock index to ease merging by
avoiding cross tree dependencies.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'lib/clz_ctz.c')
0 files changed, 0 insertions, 0 deletions