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author | Marc Zyngier <marc.zyngier@arm.com> | 2017-05-02 14:30:41 +0100 |
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committer | Christoffer Dall <cdall@linaro.org> | 2017-05-15 11:32:04 +0200 |
commit | 15d2bffdde6268883647c6112970f74d3e1af651 (patch) | |
tree | c30636f3152d7d074fe41097fc349aa4432504b1 /samples | |
parent | 3d6e77ad1489650afa20da92bb589c8778baa8da (diff) |
KVM: arm/arm64: vgic-v3: Use PREbits to infer the number of ICH_APxRn_EL2 registers
The GICv3 documentation is extremely confusing, as it talks about
the number of priorities represented by the ICH_APxRn_EL2 registers,
while it should really talk about the number of preemption levels.
This leads to a bug where we may access undefined ICH_APxRn_EL2
registers, since PREbits is allowed to be smaller than PRIbits.
Thankfully, nobody seem to have taken this path so far...
The fix is to use ICH_VTR_EL2.PREbits instead.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions