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author | Masahiro Yamada <masahiroy@kernel.org> | 2024-04-27 23:55:02 +0900 |
---|---|---|
committer | Masahiro Yamada <masahiroy@kernel.org> | 2024-05-10 04:34:52 +0900 |
commit | b1992c3772e69a6fd0e3fc81cd4d2820c8b6eca0 (patch) | |
tree | 60cc6428700d3582666b62d1d9dd741656efe1ee /scripts/Makefile.lib | |
parent | 9a0ebe5011f49e932bb0a2cea2034fd65e6e567e (diff) |
kbuild: use $(src) instead of $(srctree)/$(src) for source directory
Kbuild conventionally uses $(obj)/ for generated files, and $(src)/ for
checked-in source files. It is merely a convention without any functional
difference. In fact, $(obj) and $(src) are exactly the same, as defined
in scripts/Makefile.build:
src := $(obj)
When the kernel is built in a separate output directory, $(src) does
not accurately reflect the source directory location. While Kbuild
resolves this discrepancy by specifying VPATH=$(srctree) to search for
source files, it does not cover all cases. For example, when adding a
header search path for local headers, -I$(srctree)/$(src) is typically
passed to the compiler.
This introduces inconsistency between upstream and downstream Makefiles
because $(src) is used instead of $(srctree)/$(src) for the latter.
To address this inconsistency, this commit changes the semantics of
$(src) so that it always points to the directory in the source tree.
Going forward, the variables used in Makefiles will have the following
meanings:
$(obj) - directory in the object tree
$(src) - directory in the source tree (changed by this commit)
$(objtree) - the top of the kernel object tree
$(srctree) - the top of the kernel source tree
Consequently, $(srctree)/$(src) in upstream Makefiles need to be replaced
with $(src).
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nicolas Schier <nicolas@fjasle.eu>
Diffstat (limited to 'scripts/Makefile.lib')
-rw-r--r-- | scripts/Makefile.lib | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 42d3c772c8e0..08d42e93bea0 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -209,13 +209,13 @@ _c_flags += $(if $(patsubst n%,, \ -D__KCSAN_INSTRUMENT_BARRIERS__) endif -# $(srctree)/$(src) for including checkin headers from generated source files -# $(objtree)/$(obj) for including generated headers from checkin source files +# $(src) for including checkin headers from generated source files +# $(obj) for including generated headers from checkin source files ifeq ($(KBUILD_EXTMOD),) ifdef building_out_of_srctree -_c_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj)) -_a_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj)) -_cpp_flags += $(addprefix -I $(srctree)/,$(src)) $(addprefix -I $(objtree)/,$(obj)) +_c_flags += $(addprefix -I, $(src) $(obj)) +_a_flags += $(addprefix -I, $(src) $(obj)) +_cpp_flags += $(addprefix -I, $(src) $(obj)) endif endif |