diff options
| author | Haibo Xu <haibo1.xu@intel.com> | 2024-01-22 17:58:37 +0800 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-02-26 10:14:04 +0530 |
| commit | 1d50c77208933fd1c18be8359633913d9c482e5a (patch) | |
| tree | cddd04e410c12c547e27baa1747f53f199ed6e02 /tools/arch | |
| parent | a69459d579df9200bc6f58ff04e1a8a4984016a7 (diff) | |
tools: riscv: Add header file vdso/processor.h
Borrow the cpu_relax() definitions from kernel's
arch/riscv/include/asm/vdso/processor.h to tools/ for riscv.
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'tools/arch')
| -rw-r--r-- | tools/arch/riscv/include/asm/vdso/processor.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/tools/arch/riscv/include/asm/vdso/processor.h b/tools/arch/riscv/include/asm/vdso/processor.h new file mode 100644 index 000000000000..662aca039848 --- /dev/null +++ b/tools/arch/riscv/include/asm/vdso/processor.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __ASM_VDSO_PROCESSOR_H +#define __ASM_VDSO_PROCESSOR_H + +#ifndef __ASSEMBLY__ + +#include <asm-generic/barrier.h> + +static inline void cpu_relax(void) +{ +#ifdef __riscv_muldiv + int dummy; + /* In lieu of a halt instruction, induce a long-latency stall. */ + __asm__ __volatile__ ("div %0, %0, zero" : "=r" (dummy)); +#endif + +#ifdef CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE + /* + * Reduce instruction retirement. + * This assumes the PC changes. + */ + __asm__ __volatile__ ("pause"); +#else + /* Encoding of the pause instruction */ + __asm__ __volatile__ (".4byte 0x100000F"); +#endif + barrier(); +} + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_VDSO_PROCESSOR_H */ |