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| author | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 16:25:45 -0700 | 
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 16:25:45 -0700 | 
| commit | 0049eb1a44ce98bd0c8d3a2d9fec150664da8d66 (patch) | |
| tree | cd896277c054990707aee5ec4a5755bfa5c98903 /tools/perf/scripts/python/sctop.py | |
| parent | 568035b01cfb107af8d2e4bd2fb9aea22cf5b868 (diff) | |
| parent | 67e16ac1fec475e64dcb8238f471c6fd154ef806 (diff) | |
Merge tag 'clk-imx-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx
Pull i.MX clk driver updates from Abel Vesa:
 - Change order between 'sim_enet_root_clk' and 'enet_qos_root_clk'
   clocks for i.MX8MP
 - Drop unnecessary newline in i.MX8MM dt-bindings
 - Add more MU1 and SAI clocks dt-bindings Ids
 - Introduce slice busy bit check for i.MX93 composite clock
 - Introduce white list bit check for i.MX93 composite clock
 - Add new i.MX93 clock gate
 - Add MU1 and MU2 clocks to i.MX93 clock provider
 - Add SAI IPG clocks to i.MX93 clock provider
* tag 'clk-imx-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx93: add SAI IPG clk
  clk: imx93: add MU1/2 clock
  clk: imx93: switch to use new clk gate API
  clk: imx: add i.MX93 clk gate
  clk: imx: clk-composite-93: check white_list
  clk: imx: clk-composite-93: check slice busy
  dt-bindings: clock: imx93-clock: add more MU/SAI clocks
  dt-bindings: clock: imx8mm: don't use multiple blank lines
  clk: imx8mp: tune the order of enet_qos_root_clk
Diffstat (limited to 'tools/perf/scripts/python/sctop.py')
0 files changed, 0 insertions, 0 deletions
