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| author | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 16:01:17 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-09-28 16:01:17 -0700 |
| commit | 9e1ab1fef1ec4542fea79bb02ace412e70aa163c (patch) | |
| tree | 200f04e9f1ce401648da9f3be9e7a939db16262b /tools/perf/scripts/python/stackcollapse.py | |
| parent | 568035b01cfb107af8d2e4bd2fb9aea22cf5b868 (diff) | |
| parent | e312ae92077f90d6ccdca05fb6d640bd9624c37c (diff) | |
Merge tag 'renesas-clk-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add SDHI, Timer (CMT/TMU), and SPI (MSIOF) clocks on R-Car S4-8
- Add I2C clocks and resets on RZ/V2M
- Document clock support for the RZ/Five SoC
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
dt-bindings: clock: renesas,rzg2l: Document RZ/Five SoC
clk: renesas: r8a779f0: Add MSIOF clocks
clk: renesas: r9a09g011: Add IIC clock and reset entries
clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks
clk: renesas: r8a779f0: Add CMT clocks
clk: renesas: r8a779f0: Add SDH0 clock
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions