diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2023-10-26 17:10:05 +0100 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2023-10-26 17:10:05 +0100 |
commit | 023113fe66b4866b0d211b705e8bd287728f2e98 (patch) | |
tree | 9d0bb27c57abeb459df10783550da75a3016228b /tools | |
parent | 2a3f8ce3bb2fca943e6b3225f796ce06c29621fd (diff) | |
parent | 80652cc0c0485da593c1639a6355dcdab95364e6 (diff) |
Merge branch 'for-next/feat_lrcpc3' into for-next/core
* for-next/feat_lrcpc3:
: HWCAP for FEAT_LRCPC3
selftests/arm64: add HWCAP2_LRCPC3 test
arm64: add FEAT_LRCPC3 HWCAP
Diffstat (limited to 'tools')
-rw-r--r-- | tools/testing/selftests/arm64/abi/hwcap.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index d8a144213d04..a60f23794944 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -295,6 +295,19 @@ static void uscat_sigbus(void) asm volatile(".inst 0xb820003f" : : : ); } +static void lrcpc3_sigill(void) +{ + int data[2] = { 1, 2 }; + + register int *src asm ("x0") = data; + register int data0 asm ("w2") = 0; + register int data1 asm ("w3") = 0; + + /* LDIAPP w2, w3, [x0] */ + asm volatile(".inst 0x99431802" + : "=r" (data0), "=r" (data1) : "r" (src) :); +} + static const struct hwcap_data { const char *name; unsigned long at_hwcap; @@ -355,6 +368,13 @@ static const struct hwcap_data { .sigill_fn = ilrcpc_sigill, }, { + .name = "LRCPC3", + .at_hwcap = AT_HWCAP2, + .hwcap_bit = HWCAP2_LRCPC3, + .cpuinfo = "lrcpc3", + .sigill_fn = lrcpc3_sigill, + }, + { .name = "LSE", .at_hwcap = AT_HWCAP, .hwcap_bit = HWCAP_ATOMICS, |