diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h index f67970dc3dbd..4be45fc14954 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.h @@ -29,6 +29,7 @@ #include "amdgpu_ring.h" struct amdgpu_ring; + /** * struct amdgpu_mux_entry - the entry recording software rings copying information. * @ring: the pointer to the software ring. @@ -37,6 +38,7 @@ struct amdgpu_ring; * @sw_cptr: the position of the copy pointer in the sw ring. * @sw_rptr: the read pointer in software ring. * @sw_wptr: the write pointer in software ring. + * @list: list head for amdgpu_mux_chunk */ struct amdgpu_mux_entry { struct amdgpu_ring *ring; @@ -45,6 +47,7 @@ struct amdgpu_mux_entry { u64 sw_cptr; u64 sw_rptr; u64 sw_wptr; + struct list_head list; }; struct amdgpu_ring_mux { @@ -55,6 +58,26 @@ struct amdgpu_ring_mux { unsigned int ring_entry_size; /*the lock for copy data from different software rings*/ spinlock_t lock; + bool s_resubmit; + uint32_t seqno_to_resubmit; + u64 wptr_resubmit; + struct timer_list resubmit_timer; + + bool pending_trailing_fence_signaled; +}; + +/** + * struct amdgpu_mux_chunk - save the location of indirect buffer's package on softare rings. + * @entry: the list entry. + * @sync_seq: the fence seqno related with the saved IB. + * @start:- start location on the software ring. + * @end:- end location on the software ring. + */ +struct amdgpu_mux_chunk { + struct list_head entry; + uint32_t sync_seq; + u64 start; + u64 end; }; int amdgpu_ring_mux_init(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring, @@ -64,15 +87,17 @@ int amdgpu_ring_mux_add_sw_ring(struct amdgpu_ring_mux *mux, struct amdgpu_ring void amdgpu_ring_mux_set_wptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring, u64 wptr); u64 amdgpu_ring_mux_get_wptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring); u64 amdgpu_ring_mux_get_rptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring); +void amdgpu_ring_mux_start_ib(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring); +void amdgpu_ring_mux_end_ib(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring); +bool amdgpu_mcbp_handle_trailing_fence_irq(struct amdgpu_ring_mux *mux); u64 amdgpu_sw_ring_get_rptr_gfx(struct amdgpu_ring *ring); u64 amdgpu_sw_ring_get_wptr_gfx(struct amdgpu_ring *ring); void amdgpu_sw_ring_set_wptr_gfx(struct amdgpu_ring *ring); - void amdgpu_sw_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count); void amdgpu_sw_ring_ib_begin(struct amdgpu_ring *ring); void amdgpu_sw_ring_ib_end(struct amdgpu_ring *ring); - const char *amdgpu_sw_ring_name(int idx); unsigned int amdgpu_sw_ring_priority(int idx); + #endif |