diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 34 | 
1 files changed, 29 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c index df63dc3bca18..dea1a64be44d 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c @@ -502,6 +502,7 @@ exit:  int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,  			int level, bool immediate, struct amdgpu_bo_vm **vmbo)  { +	struct amdgpu_fpriv *fpriv = container_of(vm, struct amdgpu_fpriv, vm);  	struct amdgpu_bo_param bp;  	struct amdgpu_bo *bo;  	struct dma_resv *resv; @@ -512,7 +513,12 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,  	bp.size = amdgpu_vm_pt_size(adev, level);  	bp.byte_align = AMDGPU_GPU_PAGE_SIZE; -	bp.domain = AMDGPU_GEM_DOMAIN_VRAM; + +	if (!adev->gmc.is_app_apu) +		bp.domain = AMDGPU_GEM_DOMAIN_VRAM; +	else +		bp.domain = AMDGPU_GEM_DOMAIN_GTT; +  	bp.domain = amdgpu_bo_get_preferred_domain(adev, bp.domain);  	bp.flags = AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |  		AMDGPU_GEM_CREATE_CPU_GTT_USWC; @@ -529,6 +535,8 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,  	bp.type = ttm_bo_type_kernel;  	bp.no_wait_gpu = immediate; +	bp.xcp_id_plus1 = fpriv->xcp_id == ~0 ? 0 : fpriv->xcp_id + 1; +  	if (vm->root.bo)  		bp.resv = vm->root.bo->tbo.base.resv; @@ -553,6 +561,7 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,  	bp.type = ttm_bo_type_kernel;  	bp.resv = bo->tbo.base.resv;  	bp.bo_ptr_size = sizeof(struct amdgpu_bo); +	bp.xcp_id_plus1 = fpriv->xcp_id == ~0 ? 0 : fpriv->xcp_id + 1;  	r = amdgpu_bo_create(adev, &bp, &(*vmbo)->shadow); @@ -564,7 +573,6 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm,  		return r;  	} -	(*vmbo)->shadow->parent = amdgpu_bo_ref(bo);  	amdgpu_bo_add_to_shadow_list(*vmbo);  	return 0; @@ -781,13 +789,14 @@ static void amdgpu_vm_pte_update_flags(struct amdgpu_vm_update_params *params,  				       uint64_t pe, uint64_t addr,  				       unsigned int count, uint32_t incr,  				       uint64_t flags) -  { +	struct amdgpu_device *adev = params->adev; +  	if (level != AMDGPU_VM_PTB) {  		flags |= AMDGPU_PDE_PTE; -		amdgpu_gmc_get_vm_pde(params->adev, level, &addr, &flags); +		amdgpu_gmc_get_vm_pde(adev, level, &addr, &flags); -	} else if (params->adev->asic_type >= CHIP_VEGA10 && +	} else if (adev->asic_type >= CHIP_VEGA10 &&  		   !(flags & AMDGPU_PTE_VALID) &&  		   !(flags & AMDGPU_PTE_PRT)) { @@ -795,6 +804,21 @@ static void amdgpu_vm_pte_update_flags(struct amdgpu_vm_update_params *params,  		flags |= AMDGPU_PTE_EXECUTABLE;  	} +	/* APUs mapping system memory may need different MTYPEs on different +	 * NUMA nodes. Only do this for contiguous ranges that can be assumed +	 * to be on the same NUMA node. +	 */ +	if ((flags & AMDGPU_PTE_SYSTEM) && (adev->flags & AMD_IS_APU) && +	    adev->gmc.gmc_funcs->override_vm_pte_flags && +	    num_possible_nodes() > 1) { +		if (!params->pages_addr) +			amdgpu_gmc_override_vm_pte_flags(adev, params->vm, +							 addr, &flags); +		else +			dev_dbg(adev->dev, +				"override_vm_pte_flags skipped: non-contiguous\n"); +	} +  	params->vm->update_funcs->update(params, pt, pe, addr, count, incr,  					 flags);  }  | 
