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path: root/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
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Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/dce_v11_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v11_0.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index be25706e5f07..67e670989e81 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -156,26 +156,26 @@ static void dce_v11_0_init_golden_registers(struct amdgpu_device *adev)
case CHIP_CARRIZO:
amdgpu_program_register_sequence(adev,
cz_mgcg_cgcg_init,
- (const u32)ARRAY_SIZE(cz_mgcg_cgcg_init));
+ ARRAY_SIZE(cz_mgcg_cgcg_init));
amdgpu_program_register_sequence(adev,
cz_golden_settings_a11,
- (const u32)ARRAY_SIZE(cz_golden_settings_a11));
+ ARRAY_SIZE(cz_golden_settings_a11));
break;
case CHIP_STONEY:
amdgpu_program_register_sequence(adev,
stoney_golden_settings_a11,
- (const u32)ARRAY_SIZE(stoney_golden_settings_a11));
+ ARRAY_SIZE(stoney_golden_settings_a11));
break;
case CHIP_POLARIS11:
case CHIP_POLARIS12:
amdgpu_program_register_sequence(adev,
polaris11_golden_settings_a11,
- (const u32)ARRAY_SIZE(polaris11_golden_settings_a11));
+ ARRAY_SIZE(polaris11_golden_settings_a11));
break;
case CHIP_POLARIS10:
amdgpu_program_register_sequence(adev,
polaris10_golden_settings_a11,
- (const u32)ARRAY_SIZE(polaris10_golden_settings_a11));
+ ARRAY_SIZE(polaris10_golden_settings_a11));
break;
default:
break;