diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mca_v3_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mca_v3_0.c | 44 | 
1 files changed, 3 insertions, 41 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c index d4bd7d1d2649..6dae4a2e2767 100644 --- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c @@ -51,19 +51,13 @@ static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,  	return -EINVAL;  } -const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = { +static const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = {  	.query_ras_error_count = mca_v3_0_mp0_query_ras_error_count,  	.query_ras_error_address = NULL,  };  struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {  	.ras_block = { -		.ras_comm = { -			.block = AMDGPU_RAS_BLOCK__MCA, -			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, -			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, -			.name = "mp0", -		},  		.hw_ops = &mca_v3_0_mp0_hw_ops,  		.ras_block_match = mca_v3_0_ras_block_match,  	}, @@ -77,19 +71,13 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,  				         ras_error_status);  } -const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = { +static const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = {  	.query_ras_error_count = mca_v3_0_mp1_query_ras_error_count,  	.query_ras_error_address = NULL,  };  struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {  	.ras_block = { -		.ras_comm = { -			.block = AMDGPU_RAS_BLOCK__MCA, -			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, -			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, -			.name = "mp1", -		},  		.hw_ops = &mca_v3_0_mp1_hw_ops,  		.ras_block_match = mca_v3_0_ras_block_match,  	}, @@ -103,40 +91,14 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,  				         ras_error_status);  } -const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = { +static const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = {  	.query_ras_error_count = mca_v3_0_mpio_query_ras_error_count,  	.query_ras_error_address = NULL,  };  struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {  	.ras_block = { -		.ras_comm = { -			.block = AMDGPU_RAS_BLOCK__MCA, -			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, -			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, -			.name = "mpio", -		},  		.hw_ops = &mca_v3_0_mpio_hw_ops,  		.ras_block_match = mca_v3_0_ras_block_match,  	},  }; - - -static void mca_v3_0_init(struct amdgpu_device *adev) -{ -	struct amdgpu_mca *mca = &adev->mca; - -	mca->mp0.ras = &mca_v3_0_mp0_ras; -	mca->mp1.ras = &mca_v3_0_mp1_ras; -	mca->mpio.ras = &mca_v3_0_mpio_ras; -	amdgpu_ras_register_ras_block(adev, &mca->mp0.ras->ras_block); -	amdgpu_ras_register_ras_block(adev, &mca->mp1.ras->ras_block); -	amdgpu_ras_register_ras_block(adev, &mca->mpio.ras->ras_block); -	mca->mp0.ras_if = &mca->mp0.ras->ras_block.ras_comm; -	mca->mp1.ras_if = &mca->mp1.ras->ras_block.ras_comm; -	mca->mpio.ras_if = &mca->mpio.ras->ras_block.ras_comm; -} - -const struct amdgpu_mca_funcs mca_v3_0_funcs = { -	.init = mca_v3_0_init, -};
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