diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 36 | 
1 files changed, 30 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c index bf0674039598..e5fd1e00914d 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c @@ -139,7 +139,7 @@ static int vcn_v4_0_sw_init(void *handle)  		/* VCN POISON TRAP */  		r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i], -				VCN_4_0__SRCID_UVD_POISON, &adev->vcn.inst[i].irq); +				VCN_4_0__SRCID_UVD_POISON, &adev->vcn.inst[i].ras_poison_irq);  		if (r)  			return r; @@ -305,8 +305,8 @@ static int vcn_v4_0_hw_fini(void *handle)                          vcn_v4_0_set_powergating_state(adev, AMD_PG_STATE_GATE);  			}  		} - -		amdgpu_irq_put(adev, &adev->vcn.inst[i].irq, 0); +		if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) +			amdgpu_irq_put(adev, &adev->vcn.inst[i].ras_poison_irq, 0);  	}  	return 0; @@ -1976,6 +1976,24 @@ static int vcn_v4_0_set_interrupt_state(struct amdgpu_device *adev, struct amdgp  }  /** + * vcn_v4_0_set_ras_interrupt_state - set VCN block RAS interrupt state + * + * @adev: amdgpu_device pointer + * @source: interrupt sources + * @type: interrupt types + * @state: interrupt states + * + * Set VCN block RAS interrupt state + */ +static int vcn_v4_0_set_ras_interrupt_state(struct amdgpu_device *adev, +	struct amdgpu_irq_src *source, +	unsigned int type, +	enum amdgpu_interrupt_state state) +{ +	return 0; +} + +/**   * vcn_v4_0_process_interrupt - process VCN block interrupt   *   * @adev: amdgpu_device pointer @@ -2007,9 +2025,6 @@ static int vcn_v4_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_  	case VCN_4_0__SRCID__UVD_ENC_GENERAL_PURPOSE:  		amdgpu_fence_process(&adev->vcn.inst[ip_instance].ring_enc[0]);  		break; -	case VCN_4_0__SRCID_UVD_POISON: -		amdgpu_vcn_process_poison_irq(adev, source, entry); -		break;  	default:  		DRM_ERROR("Unhandled interrupt: %d %d\n",  			  entry->src_id, entry->src_data[0]); @@ -2024,6 +2039,11 @@ static const struct amdgpu_irq_src_funcs vcn_v4_0_irq_funcs = {  	.process = vcn_v4_0_process_interrupt,  }; +static const struct amdgpu_irq_src_funcs vcn_v4_0_ras_irq_funcs = { +	.set = vcn_v4_0_set_ras_interrupt_state, +	.process = amdgpu_vcn_process_poison_irq, +}; +  /**   * vcn_v4_0_set_irq_funcs - set VCN block interrupt irq functions   * @@ -2041,6 +2061,9 @@ static void vcn_v4_0_set_irq_funcs(struct amdgpu_device *adev)  		adev->vcn.inst[i].irq.num_types = adev->vcn.num_enc_rings + 1;  		adev->vcn.inst[i].irq.funcs = &vcn_v4_0_irq_funcs; + +		adev->vcn.inst[i].ras_poison_irq.num_types = adev->vcn.num_enc_rings + 1; +		adev->vcn.inst[i].ras_poison_irq.funcs = &vcn_v4_0_ras_irq_funcs;  	}  } @@ -2114,6 +2137,7 @@ const struct amdgpu_ras_block_hw_ops vcn_v4_0_ras_hw_ops = {  static struct amdgpu_vcn_ras vcn_v4_0_ras = {  	.ras_block = {  		.hw_ops = &vcn_v4_0_ras_hw_ops, +		.ras_late_init = amdgpu_vcn_ras_late_init,  	},  };  | 
