diff options
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_combo_phy.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_combo_phy.c | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c index d88f91038428..eccaa79cb4a9 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c @@ -255,26 +255,6 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy) return phy == PHY_A; } -static bool verify_wa14011224835(struct drm_i915_private *i915) -{ - u32 grccode, val; - bool ret = true; - - grccode = REG_FIELD_GET(GRCCODE, - intel_de_read(i915, ICL_PORT_COMP_DW6(PHY_A))); - val = REG_FIELD_PREP(IREF_RCAL_ORD, grccode); - ret &= check_phy_reg(i915, PHY_B, ICL_PORT_COMP_DW2(PHY_B), - IREF_RCAL_ORD, val); - - grccode = REG_FIELD_GET(GRCCODE_LDO, - intel_de_read(i915, ICL_PORT_COMP_DW0(PHY_A))); - val = REG_FIELD_PREP(RCOMPCODE_LD_CAP_OV, grccode); - ret &= check_phy_reg(i915, PHY_B, ICL_PORT_COMP_DW2(PHY_B), - IREF_RCAL_ORD, val); - - return ret; -} - static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, enum phy phy) { @@ -315,11 +295,6 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, ret &= check_phy_reg(dev_priv, phy, ICL_PORT_CL_DW5(phy), CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE); - /* Wa_14011224835:rkl[a0..b0] */ - if (IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_B0) && - phy == PHY_B) - ret &= verify_wa14011224835(dev_priv); - return ret; } @@ -375,26 +350,6 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, intel_de_write(dev_priv, ICL_PORT_CL_DW10(phy), val); } -static void rkl_combo_phy_b_init_wa(struct drm_i915_private *i915) -{ - u32 grccode, val; - - wait_for_us(intel_de_read(i915, ICL_PORT_COMP_DW3(PHY_A)) & - FIRST_COMP_DONE, 100); - - grccode = REG_FIELD_GET(GRCCODE, - intel_de_read(i915, ICL_PORT_COMP_DW6(PHY_A))); - val = REG_FIELD_PREP(IREF_RCAL_ORD, grccode); - intel_de_rmw(i915, ICL_PORT_COMP_DW2(PHY_B), IREF_RCAL_ORD, - val | IREF_RCAL_ORD_EN); - - grccode = REG_FIELD_GET(GRCCODE_LDO, - intel_de_read(i915, ICL_PORT_COMP_DW0(PHY_A))); - val = REG_FIELD_PREP(RCOMPCODE_LD_CAP_OV, grccode); - intel_de_rmw(i915, ICL_PORT_COMP_DW6(PHY_B), RCOMPCODE_LD_CAP_OV, - val | RCOMPCODEOVEN_LDO_SYNC); -} - static void icl_combo_phys_init(struct drm_i915_private *dev_priv) { enum phy phy; @@ -460,11 +415,6 @@ skip_phy_misc: val = intel_de_read(dev_priv, ICL_PORT_CL_DW5(phy)); val |= CL_POWER_DOWN_ENABLE; intel_de_write(dev_priv, ICL_PORT_CL_DW5(phy), val); - - if (IS_RKL_REVID(dev_priv, RKL_REVID_A0, RKL_REVID_B0) && - phy == PHY_B) - /* Wa_14011224835:rkl[a0..b0] */ - rkl_combo_phy_b_init_wa(dev_priv); } } |