diff options
Diffstat (limited to 'drivers/mtd')
29 files changed, 752 insertions, 132 deletions
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c index 134e27328597..25bad4318305 100644 --- a/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c @@ -112,6 +112,13 @@ static const struct of_device_id dataflash_dt_ids[] = { MODULE_DEVICE_TABLE(of, dataflash_dt_ids); #endif +static const struct spi_device_id dataflash_spi_ids[] = { + { .name = "at45", }, + { .name = "dataflash", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, dataflash_spi_ids); + /* ......................................................................... */ /* @@ -936,6 +943,7 @@ static struct spi_driver dataflash_driver = { .probe = dataflash_probe, .remove = dataflash_remove, + .id_table = dataflash_spi_ids, /* FIXME: investigate suspend and resume... */ }; diff --git a/drivers/mtd/devices/powernv_flash.c b/drivers/mtd/devices/powernv_flash.c index 6950a8764815..36e060386e59 100644 --- a/drivers/mtd/devices/powernv_flash.c +++ b/drivers/mtd/devices/powernv_flash.c @@ -270,7 +270,9 @@ static int powernv_flash_release(struct platform_device *pdev) struct powernv_flash *data = dev_get_drvdata(&(pdev->dev)); /* All resources should be freed automatically */ - return mtd_device_unregister(&(data->mtd)); + WARN_ON(mtd_device_unregister(&data->mtd)); + + return 0; } static const struct of_device_id powernv_flash_match[] = { diff --git a/drivers/mtd/devices/spear_smi.c b/drivers/mtd/devices/spear_smi.c index 24073518587f..f58742486d3d 100644 --- a/drivers/mtd/devices/spear_smi.c +++ b/drivers/mtd/devices/spear_smi.c @@ -1045,13 +1045,9 @@ static int spear_smi_remove(struct platform_device *pdev) { struct spear_smi *dev; struct spear_snor_flash *flash; - int ret, i; + int i; dev = platform_get_drvdata(pdev); - if (!dev) { - dev_err(&pdev->dev, "dev is null\n"); - return -ENODEV; - } /* clean up for all nor flash */ for (i = 0; i < dev->num_flashes; i++) { @@ -1060,9 +1056,7 @@ static int spear_smi_remove(struct platform_device *pdev) continue; /* clean up mtd stuff */ - ret = mtd_device_unregister(&flash->mtd); - if (ret) - dev_err(&pdev->dev, "error removing mtd\n"); + WARN_ON(mtd_device_unregister(&flash->mtd)); } clk_disable_unprepare(dev->clk); diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index d3377b10fc0f..54861d889c30 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -2084,15 +2084,12 @@ static int stfsm_probe(struct platform_device *pdev) * Configure READ/WRITE/ERASE sequences according to platform and * device flags. */ - if (info->config) { + if (info->config) ret = info->config(fsm); - if (ret) - goto err_clk_unprepare; - } else { + else ret = stfsm_prepare_rwe_seqs_default(fsm); - if (ret) - goto err_clk_unprepare; - } + if (ret) + goto err_clk_unprepare; fsm->mtd.name = info->name; fsm->mtd.dev.parent = &pdev->dev; @@ -2115,10 +2112,12 @@ static int stfsm_probe(struct platform_device *pdev) (long long)fsm->mtd.size, (long long)(fsm->mtd.size >> 20), fsm->mtd.erasesize, (fsm->mtd.erasesize >> 10)); - return mtd_device_register(&fsm->mtd, NULL, 0); - + ret = mtd_device_register(&fsm->mtd, NULL, 0); + if (ret) { err_clk_unprepare: - clk_disable_unprepare(fsm->clk); + clk_disable_unprepare(fsm->clk); + } + return ret; } @@ -2126,9 +2125,11 @@ static int stfsm_remove(struct platform_device *pdev) { struct stfsm *fsm = platform_get_drvdata(pdev); + WARN_ON(mtd_device_unregister(&fsm->mtd)); + clk_disable_unprepare(fsm->clk); - return mtd_device_unregister(&fsm->mtd); + return 0; } #ifdef CONFIG_PM_SLEEP diff --git a/drivers/mtd/hyperbus/hbmc-am654.c b/drivers/mtd/hyperbus/hbmc-am654.c index a3439b791eeb..a6161ce340d4 100644 --- a/drivers/mtd/hyperbus/hbmc-am654.c +++ b/drivers/mtd/hyperbus/hbmc-am654.c @@ -233,16 +233,16 @@ static int am654_hbmc_remove(struct platform_device *pdev) { struct am654_hbmc_priv *priv = platform_get_drvdata(pdev); struct am654_hbmc_device_priv *dev_priv = priv->hbdev.priv; - int ret; - ret = hyperbus_unregister_device(&priv->hbdev); + hyperbus_unregister_device(&priv->hbdev); + if (priv->mux_ctrl) mux_control_deselect(priv->mux_ctrl); if (dev_priv->rx_chan) dma_release_channel(dev_priv->rx_chan); - return ret; + return 0; } static const struct of_device_id am654_hbmc_dt_ids[] = { diff --git a/drivers/mtd/hyperbus/hyperbus-core.c b/drivers/mtd/hyperbus/hyperbus-core.c index 2f9fc4e17d53..4d8047d43e48 100644 --- a/drivers/mtd/hyperbus/hyperbus-core.c +++ b/drivers/mtd/hyperbus/hyperbus-core.c @@ -126,16 +126,12 @@ int hyperbus_register_device(struct hyperbus_device *hbdev) } EXPORT_SYMBOL_GPL(hyperbus_register_device); -int hyperbus_unregister_device(struct hyperbus_device *hbdev) +void hyperbus_unregister_device(struct hyperbus_device *hbdev) { - int ret = 0; - if (hbdev && hbdev->mtd) { - ret = mtd_device_unregister(hbdev->mtd); + WARN_ON(mtd_device_unregister(hbdev->mtd)); map_destroy(hbdev->mtd); } - - return ret; } EXPORT_SYMBOL_GPL(hyperbus_unregister_device); diff --git a/drivers/mtd/hyperbus/rpc-if.c b/drivers/mtd/hyperbus/rpc-if.c index 6e08ec1d4f09..d00d30243403 100644 --- a/drivers/mtd/hyperbus/rpc-if.c +++ b/drivers/mtd/hyperbus/rpc-if.c @@ -134,7 +134,7 @@ static int rpcif_hb_probe(struct platform_device *pdev) error = rpcif_hw_init(&hyperbus->rpc, true); if (error) - return error; + goto out_disable_rpm; hyperbus->hbdev.map.size = hyperbus->rpc.size; hyperbus->hbdev.map.virt = hyperbus->rpc.dirmap; @@ -145,19 +145,24 @@ static int rpcif_hb_probe(struct platform_device *pdev) hyperbus->hbdev.np = of_get_next_child(pdev->dev.parent->of_node, NULL); error = hyperbus_register_device(&hyperbus->hbdev); if (error) - rpcif_disable_rpm(&hyperbus->rpc); + goto out_disable_rpm; + + return 0; +out_disable_rpm: + rpcif_disable_rpm(&hyperbus->rpc); return error; } static int rpcif_hb_remove(struct platform_device *pdev) { struct rpcif_hyperbus *hyperbus = platform_get_drvdata(pdev); - int error = hyperbus_unregister_device(&hyperbus->hbdev); + + hyperbus_unregister_device(&hyperbus->hbdev); rpcif_disable_rpm(&hyperbus->rpc); - return error; + return 0; } static struct platform_driver rpcif_platform_driver = { diff --git a/drivers/mtd/lpddr/lpddr2_nvm.c b/drivers/mtd/lpddr/lpddr2_nvm.c index 72f5c7b30079..367e2d906de0 100644 --- a/drivers/mtd/lpddr/lpddr2_nvm.c +++ b/drivers/mtd/lpddr/lpddr2_nvm.c @@ -478,7 +478,9 @@ static int lpddr2_nvm_probe(struct platform_device *pdev) */ static int lpddr2_nvm_remove(struct platform_device *pdev) { - return mtd_device_unregister(dev_get_drvdata(&pdev->dev)); + WARN_ON(mtd_device_unregister(dev_get_drvdata(&pdev->dev))); + + return 0; } /* Initialize platform_driver data structure for lpddr2_nvm */ diff --git a/drivers/mtd/maps/physmap-core.c b/drivers/mtd/maps/physmap-core.c index 4f63b8430c71..85eca6a192e6 100644 --- a/drivers/mtd/maps/physmap-core.c +++ b/drivers/mtd/maps/physmap-core.c @@ -66,18 +66,12 @@ static int physmap_flash_remove(struct platform_device *dev) { struct physmap_flash_info *info; struct physmap_flash_data *physmap_data; - int i, err = 0; + int i; info = platform_get_drvdata(dev); - if (!info) { - err = -EINVAL; - goto out; - } if (info->cmtd) { - err = mtd_device_unregister(info->cmtd); - if (err) - goto out; + WARN_ON(mtd_device_unregister(info->cmtd)); if (info->cmtd != info->mtds[0]) mtd_concat_destroy(info->cmtd); @@ -92,10 +86,9 @@ static int physmap_flash_remove(struct platform_device *dev) if (physmap_data && physmap_data->exit) physmap_data->exit(dev); -out: pm_runtime_put(&dev->dev); pm_runtime_disable(&dev->dev); - return err; + return 0; } static void physmap_set_vpp(struct map_info *map, int state) diff --git a/drivers/mtd/maps/physmap-versatile.c b/drivers/mtd/maps/physmap-versatile.c index ad7cd9cfaee0..a1b8b7b25f88 100644 --- a/drivers/mtd/maps/physmap-versatile.c +++ b/drivers/mtd/maps/physmap-versatile.c @@ -93,6 +93,7 @@ static int ap_flash_init(struct platform_device *pdev) return -ENODEV; } ebi_base = of_iomap(ebi, 0); + of_node_put(ebi); if (!ebi_base) return -ENODEV; @@ -207,6 +208,7 @@ int of_flash_probe_versatile(struct platform_device *pdev, versatile_flashprot = (enum versatile_flashprot)devid->data; rmap = syscon_node_to_regmap(sysnp); + of_node_put(sysnp); if (IS_ERR(rmap)) return PTR_ERR(rmap); diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index d0f9c4b0285c..05860288a7af 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -615,21 +615,24 @@ static int mtdchar_write_ioctl(struct mtd_info *mtd, if (!usr_oob) req.ooblen = 0; + req.len &= 0xffffffff; + req.ooblen &= 0xffffffff; + if (req.start + req.len > mtd->size) return -EINVAL; datbuf_len = min_t(size_t, req.len, mtd->erasesize); if (datbuf_len > 0) { - datbuf = kmalloc(datbuf_len, GFP_KERNEL); + datbuf = kvmalloc(datbuf_len, GFP_KERNEL); if (!datbuf) return -ENOMEM; } oobbuf_len = min_t(size_t, req.ooblen, mtd->erasesize); if (oobbuf_len > 0) { - oobbuf = kmalloc(oobbuf_len, GFP_KERNEL); + oobbuf = kvmalloc(oobbuf_len, GFP_KERNEL); if (!oobbuf) { - kfree(datbuf); + kvfree(datbuf); return -ENOMEM; } } @@ -679,8 +682,8 @@ static int mtdchar_write_ioctl(struct mtd_info *mtd, usr_oob += ops.oobretlen; } - kfree(datbuf); - kfree(oobbuf); + kvfree(datbuf); + kvfree(oobbuf); return ret; } diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 9eb0680db312..6fafea80fd98 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -546,6 +546,66 @@ static int mtd_nvmem_add(struct mtd_info *mtd) return 0; } +static void mtd_check_of_node(struct mtd_info *mtd) +{ + struct device_node *partitions, *parent_dn, *mtd_dn = NULL; + const char *pname, *prefix = "partition-"; + int plen, mtd_name_len, offset, prefix_len; + struct mtd_info *parent; + bool found = false; + + /* Check if MTD already has a device node */ + if (dev_of_node(&mtd->dev)) + return; + + /* Check if a partitions node exist */ + parent = mtd->parent; + parent_dn = dev_of_node(&parent->dev); + if (!parent_dn) + return; + + partitions = of_get_child_by_name(parent_dn, "partitions"); + if (!partitions) + goto exit_parent; + + prefix_len = strlen(prefix); + mtd_name_len = strlen(mtd->name); + + /* Search if a partition is defined with the same name */ + for_each_child_of_node(partitions, mtd_dn) { + offset = 0; + + /* Skip partition with no/wrong prefix */ + if (!of_node_name_prefix(mtd_dn, "partition-")) + continue; + + /* Label have priority. Check that first */ + if (of_property_read_string(mtd_dn, "label", &pname)) { + of_property_read_string(mtd_dn, "name", &pname); + offset = prefix_len; + } + + plen = strlen(pname) - offset; + if (plen == mtd_name_len && + !strncmp(mtd->name, pname + offset, plen)) { + found = true; + break; + } + } + + if (!found) + goto exit_partitions; + + /* Set of_node only for nvmem */ + if (of_device_is_compatible(mtd_dn, "nvmem-cells")) + mtd_set_of_node(mtd, mtd_dn); + +exit_partitions: + of_node_put(partitions); +exit_parent: + of_node_put(parent_dn); +} + /** * add_mtd_device - register an MTD device * @mtd: pointer to new MTD device info structure @@ -658,6 +718,7 @@ int add_mtd_device(struct mtd_info *mtd) mtd->dev.devt = MTD_DEVT(i); dev_set_name(&mtd->dev, "mtd%d", i); dev_set_drvdata(&mtd->dev, mtd); + mtd_check_of_node(mtd); of_node_get(mtd_get_of_node(mtd)); error = device_register(&mtd->dev); if (error) diff --git a/drivers/mtd/nand/raw/arasan-nand-controller.c b/drivers/mtd/nand/raw/arasan-nand-controller.c index 53bd10738418..296fb16c8dc3 100644 --- a/drivers/mtd/nand/raw/arasan-nand-controller.c +++ b/drivers/mtd/nand/raw/arasan-nand-controller.c @@ -347,17 +347,17 @@ static int anfc_select_target(struct nand_chip *chip, int target) /* Update clock frequency */ if (nfc->cur_clk != anand->clk) { - clk_disable_unprepare(nfc->controller_clk); - ret = clk_set_rate(nfc->controller_clk, anand->clk); + clk_disable_unprepare(nfc->bus_clk); + ret = clk_set_rate(nfc->bus_clk, anand->clk); if (ret) { dev_err(nfc->dev, "Failed to change clock rate\n"); return ret; } - ret = clk_prepare_enable(nfc->controller_clk); + ret = clk_prepare_enable(nfc->bus_clk); if (ret) { dev_err(nfc->dev, - "Failed to re-enable the controller clock\n"); + "Failed to re-enable the bus clock\n"); return ret; } @@ -1043,7 +1043,13 @@ static int anfc_setup_interface(struct nand_chip *chip, int target, DQS_BUFF_SEL_OUT(dqs_mode); } - anand->clk = ANFC_XLNX_SDR_DFLT_CORE_CLK; + if (nand_interface_is_sdr(conf)) { + anand->clk = ANFC_XLNX_SDR_DFLT_CORE_CLK; + } else { + /* ONFI timings are defined in picoseconds */ + anand->clk = div_u64((u64)NSEC_PER_SEC * 1000, + conf->timings.nvddr.tCK_min); + } /* * Due to a hardware bug in the ZynqMP SoC, SDR timing modes 0-1 work diff --git a/drivers/mtd/nand/raw/atmel/nand-controller.c b/drivers/mtd/nand/raw/atmel/nand-controller.c index 6ef14442c71a..c9ac3baf68c0 100644 --- a/drivers/mtd/nand/raw/atmel/nand-controller.c +++ b/drivers/mtd/nand/raw/atmel/nand-controller.c @@ -2629,7 +2629,9 @@ static int atmel_nand_controller_remove(struct platform_device *pdev) { struct atmel_nand_controller *nc = platform_get_drvdata(pdev); - return nc->caps->ops->remove(nc); + WARN_ON(nc->caps->ops->remove(nc)); + + return 0; } static __maybe_unused int atmel_nand_controller_resume(struct device *dev) diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c index 9dbf031716a6..af119e376352 100644 --- a/drivers/mtd/nand/raw/cafe_nand.c +++ b/drivers/mtd/nand/raw/cafe_nand.c @@ -679,8 +679,10 @@ static int cafe_nand_probe(struct pci_dev *pdev, pci_set_master(pdev); cafe = kzalloc(sizeof(*cafe), GFP_KERNEL); - if (!cafe) - return -ENOMEM; + if (!cafe) { + err = -ENOMEM; + goto out_disable_device; + } mtd = nand_to_mtd(&cafe->nand); mtd->dev.parent = &pdev->dev; @@ -801,6 +803,8 @@ static int cafe_nand_probe(struct pci_dev *pdev, pci_iounmap(pdev, cafe->mmio); out_free_mtd: kfree(cafe); + out_disable_device: + pci_disable_device(pdev); out: return err; } @@ -822,6 +826,7 @@ static void cafe_nand_remove(struct pci_dev *pdev) pci_iounmap(pdev, cafe->mmio); dma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr); kfree(cafe); + pci_disable_device(pdev); } static const struct pci_device_id cafe_nand_tbl[] = { diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c index ac3be92872d0..829b76b303aa 100644 --- a/drivers/mtd/nand/raw/meson_nand.c +++ b/drivers/mtd/nand/raw/meson_nand.c @@ -1293,26 +1293,20 @@ meson_nfc_nand_chip_init(struct device *dev, return 0; } -static int meson_nfc_nand_chip_cleanup(struct meson_nfc *nfc) +static void meson_nfc_nand_chip_cleanup(struct meson_nfc *nfc) { struct meson_nfc_nand_chip *meson_chip; struct mtd_info *mtd; - int ret; while (!list_empty(&nfc->chips)) { meson_chip = list_first_entry(&nfc->chips, struct meson_nfc_nand_chip, node); mtd = nand_to_mtd(&meson_chip->nand); - ret = mtd_device_unregister(mtd); - if (ret) - return ret; + WARN_ON(mtd_device_unregister(mtd)); - meson_nfc_free_buffer(&meson_chip->nand); nand_cleanup(&meson_chip->nand); list_del(&meson_chip->node); } - - return 0; } static int meson_nfc_nand_chips_init(struct device *dev, @@ -1445,16 +1439,11 @@ err_clk: static int meson_nfc_remove(struct platform_device *pdev) { struct meson_nfc *nfc = platform_get_drvdata(pdev); - int ret; - ret = meson_nfc_nand_chip_cleanup(nfc); - if (ret) - return ret; + meson_nfc_nand_chip_cleanup(nfc); meson_nfc_disable_clk(nfc); - platform_set_drvdata(pdev, NULL); - return 0; } diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c index 58c32a11792e..4a9f2b6c772d 100644 --- a/drivers/mtd/nand/raw/omap2.c +++ b/drivers/mtd/nand/raw/omap2.c @@ -2278,16 +2278,14 @@ static int omap_nand_remove(struct platform_device *pdev) struct mtd_info *mtd = platform_get_drvdata(pdev); struct nand_chip *nand_chip = mtd_to_nand(mtd); struct omap_nand_info *info = mtd_to_omap(mtd); - int ret; rawnand_sw_bch_cleanup(nand_chip); if (info->dma) dma_release_channel(info->dma); - ret = mtd_device_unregister(mtd); - WARN_ON(ret); + WARN_ON(mtd_device_unregister(mtd)); nand_cleanup(nand_chip); - return ret; + return 0; } /* omap_nand_ids defined in linux/platform_data/mtd-nand-omap2.h */ diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index 048b255faa76..8f80019a9f01 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -80,8 +80,10 @@ #define DISABLE_STATUS_AFTER_WRITE 4 #define CW_PER_PAGE 6 #define UD_SIZE_BYTES 9 +#define UD_SIZE_BYTES_MASK GENMASK(18, 9) #define ECC_PARITY_SIZE_BYTES_RS 19 #define SPARE_SIZE_BYTES 23 +#define SPARE_SIZE_BYTES_MASK GENMASK(26, 23) #define NUM_ADDR_CYCLES 27 #define STATUS_BFR_READ 30 #define SET_RD_MODE_AFTER_STATUS 31 @@ -102,6 +104,7 @@ #define ECC_MODE 4 #define ECC_PARITY_SIZE_BYTES_BCH 8 #define ECC_NUM_DATA_BYTES 16 +#define ECC_NUM_DATA_BYTES_MASK GENMASK(25, 16) #define ECC_FORCE_CLK_OPEN 30 /* NAND_DEV_CMD1 bits */ @@ -238,6 +241,9 @@ nandc_set_reg(chip, reg, \ * @bam_ce - the array of BAM command elements * @cmd_sgl - sgl for NAND BAM command pipe * @data_sgl - sgl for NAND BAM consumer/producer pipe + * @last_data_desc - last DMA desc in data channel (tx/rx). + * @last_cmd_desc - last DMA desc in command channel. + * @txn_done - completion for NAND transfer. * @bam_ce_pos - the index in bam_ce which is available for next sgl * @bam_ce_start - the index in bam_ce which marks the start position ce * for current sgl. It will be used for size calculation @@ -250,14 +256,14 @@ nandc_set_reg(chip, reg, \ * @rx_sgl_start - start index in data sgl for rx. * @wait_second_completion - wait for second DMA desc completion before making * the NAND transfer completion. - * @txn_done - completion for NAND transfer. - * @last_data_desc - last DMA desc in data channel (tx/rx). - * @last_cmd_desc - last DMA desc in command channel. */ struct bam_transaction { struct bam_cmd_element *bam_ce; struct scatterlist *cmd_sgl; struct scatterlist *data_sgl; + struct dma_async_tx_descriptor *last_data_desc; + struct dma_async_tx_descriptor *last_cmd_desc; + struct completion txn_done; u32 bam_ce_pos; u32 bam_ce_start; u32 cmd_sgl_pos; @@ -267,25 +273,23 @@ struct bam_transaction { u32 rx_sgl_pos; u32 rx_sgl_start; bool wait_second_completion; - struct completion txn_done; - struct dma_async_tx_descriptor *last_data_desc; - struct dma_async_tx_descriptor *last_cmd_desc; }; /* * This data type corresponds to the nand dma descriptor + * @dma_desc - low level DMA engine descriptor * @list - list for desc_info - * @dir - DMA transfer direction + * * @adm_sgl - sgl which will be used for single sgl dma descriptor. Only used by * ADM * @bam_sgl - sgl which will be used for dma descriptor. Only used by BAM * @sgl_cnt - number of SGL in bam_sgl. Only used by BAM - * @dma_desc - low level DMA engine descriptor + * @dir - DMA transfer direction */ struct desc_info { + struct dma_async_tx_descriptor *dma_desc; struct list_head node; - enum dma_data_direction dir; union { struct scatterlist adm_sgl; struct { @@ -293,7 +297,7 @@ struct desc_info { int sgl_cnt; }; }; - struct dma_async_tx_descriptor *dma_desc; + enum dma_data_direction dir; }; /* @@ -337,52 +341,64 @@ struct nandc_regs { /* * NAND controller data struct * - * @controller: base controller structure - * @host_list: list containing all the chips attached to the - * controller * @dev: parent device + * * @base: MMIO base - * @base_phys: physical base address of controller registers - * @base_dma: dma base address of controller registers + * * @core_clk: controller clock * @aon_clk: another controller clock * + * @regs: a contiguous chunk of memory for DMA register + * writes. contains the register values to be + * written to controller + * + * @props: properties of current NAND controller, + * initialized via DT match data + * + * @controller: base controller structure + * @host_list: list containing all the chips attached to the + * controller + * * @chan: dma channel * @cmd_crci: ADM DMA CRCI for command flow control * @data_crci: ADM DMA CRCI for data flow control + * * @desc_list: DMA descriptor list (list of desc_infos) * * @data_buffer: our local DMA buffer for page read/writes, * used when we can't use the buffer provided * by upper layers directly - * @buf_size/count/start: markers for chip->legacy.read_buf/write_buf - * functions * @reg_read_buf: local buffer for reading back registers via DMA + * + * @base_phys: physical base address of controller registers + * @base_dma: dma base address of controller registers * @reg_read_dma: contains dma address for register read buffer - * @reg_read_pos: marker for data read in reg_read_buf * - * @regs: a contiguous chunk of memory for DMA register - * writes. contains the register values to be - * written to controller - * @cmd1/vld: some fixed controller register values - * @props: properties of current NAND controller, - * initialized via DT match data + * @buf_size/count/start: markers for chip->legacy.read_buf/write_buf + * functions * @max_cwperpage: maximum QPIC codewords required. calculated * from all connected NAND devices pagesize + * + * @reg_read_pos: marker for data read in reg_read_buf + * + * @cmd1/vld: some fixed controller register values */ struct qcom_nand_controller { - struct nand_controller controller; - struct list_head host_list; - struct device *dev; void __iomem *base; - phys_addr_t base_phys; - dma_addr_t base_dma; struct clk *core_clk; struct clk *aon_clk; + struct nandc_regs *regs; + struct bam_transaction *bam_txn; + + const struct qcom_nandc_props *props; + + struct nand_controller controller; + struct list_head host_list; + union { /* will be used only by QPIC for BAM DMA */ struct { @@ -400,64 +416,89 @@ struct qcom_nand_controller { }; struct list_head desc_list; - struct bam_transaction *bam_txn; u8 *data_buffer; + __le32 *reg_read_buf; + + phys_addr_t base_phys; + dma_addr_t base_dma; + dma_addr_t reg_read_dma; + int buf_size; int buf_count; int buf_start; unsigned int max_cwperpage; - __le32 *reg_read_buf; - dma_addr_t reg_read_dma; int reg_read_pos; - struct nandc_regs *regs; - u32 cmd1, vld; - const struct qcom_nandc_props *props; +}; + +/* + * NAND special boot partitions + * + * @page_offset: offset of the partition where spare data is not protected + * by ECC (value in pages) + * @page_offset: size of the partition where spare data is not protected + * by ECC (value in pages) + */ +struct qcom_nand_boot_partition { + u32 page_offset; + u32 page_size; }; /* * NAND chip structure * + * @boot_partitions: array of boot partitions where offset and size of the + * boot partitions are stored + * * @chip: base NAND chip structure * @node: list node to add itself to host_list in * qcom_nand_controller * + * @nr_boot_partitions: count of the boot partitions where spare data is not + * protected by ECC + * * @cs: chip select value for this chip * @cw_size: the number of bytes in a single step/codeword * of a page, consisting of all data, ecc, spare * and reserved bytes * @cw_data: the number of bytes within a codeword protected * by ECC - * @use_ecc: request the controller to use ECC for the - * upcoming read/write - * @bch_enabled: flag to tell whether BCH ECC mode is used * @ecc_bytes_hw: ECC bytes used by controller hardware for this * chip - * @status: value to be returned if NAND_CMD_STATUS command - * is executed + * * @last_command: keeps track of last command on this chip. used * for reading correct status * * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for * ecc/non-ecc mode for the current nand flash * device + * + * @status: value to be returned if NAND_CMD_STATUS command + * is executed + * @codeword_fixup: keep track of the current layout used by + * the driver for read/write operation. + * @use_ecc: request the controller to use ECC for the + * upcoming read/write + * @bch_enabled: flag to tell whether BCH ECC mode is used */ struct qcom_nand_host { + struct qcom_nand_boot_partition *boot_partitions; + struct nand_chip chip; struct list_head node; + int nr_boot_partitions; + int cs; int cw_size; int cw_data; - bool use_ecc; - bool bch_enabled; int ecc_bytes_hw; int spare_bytes; int bbm_size; - u8 status; + int last_command; u32 cfg0, cfg1; @@ -466,23 +507,30 @@ struct qcom_nand_host { u32 ecc_bch_cfg; u32 clrflashstatus; u32 clrreadstatus; + + u8 status; + bool codeword_fixup; + bool use_ecc; + bool bch_enabled; }; /* * This data type corresponds to the NAND controller properties which varies * among different NAND controllers. * @ecc_modes - ecc mode for NAND + * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset * @is_bam - whether NAND controller is using BAM * @is_qpic - whether NAND CTRL is part of qpic IP * @qpic_v2 - flag to indicate QPIC IP version 2 - * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset + * @use_codeword_fixup - whether NAND has different layout for boot partitions */ struct qcom_nandc_props { u32 ecc_modes; + u32 dev_cmd_reg_start; bool is_bam; bool is_qpic; bool qpic_v2; - u32 dev_cmd_reg_start; + bool use_codeword_fixup; }; /* Frees the BAM transaction memory */ @@ -1701,7 +1749,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip, data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1); oob_size1 = host->bbm_size; - if (qcom_nandc_is_last_cw(ecc, cw)) { + if (qcom_nandc_is_last_cw(ecc, cw) && !host->codeword_fixup) { data_size2 = ecc->size - data_size1 - ((ecc->steps - 1) * 4); oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw + @@ -1782,7 +1830,7 @@ check_for_erased_page(struct qcom_nand_host *host, u8 *data_buf, } for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) { - if (qcom_nandc_is_last_cw(ecc, cw)) { + if (qcom_nandc_is_last_cw(ecc, cw) && !host->codeword_fixup) { data_size = ecc->size - ((ecc->steps - 1) * 4); oob_size = (ecc->steps * 4) + host->ecc_bytes_hw; } else { @@ -1940,7 +1988,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf, for (i = 0; i < ecc->steps; i++) { int data_size, oob_size; - if (qcom_nandc_is_last_cw(ecc, i)) { + if (qcom_nandc_is_last_cw(ecc, i) && !host->codeword_fixup) { data_size = ecc->size - ((ecc->steps - 1) << 2); oob_size = (ecc->steps << 2) + host->ecc_bytes_hw + host->spare_bytes; @@ -2037,6 +2085,69 @@ static int copy_last_cw(struct qcom_nand_host *host, int page) return ret; } +static bool qcom_nandc_is_boot_partition(struct qcom_nand_host *host, int page) +{ + struct qcom_nand_boot_partition *boot_partition; + u32 start, end; + int i; + + /* + * Since the frequent access will be to the non-boot partitions like rootfs, + * optimize the page check by: + * + * 1. Checking if the page lies after the last boot partition. + * 2. Checking from the boot partition end. + */ + + /* First check the last boot partition */ + boot_partition = &host->boot_partitions[host->nr_boot_partitions - 1]; + start = boot_partition->page_offset; + end = start + boot_partition->page_size; + + /* Page is after the last boot partition end. This is NOT a boot partition */ + if (page > end) + return false; + + /* Actually check if it's a boot partition */ + if (page < end && page >= start) + return true; + + /* Check the other boot partitions starting from the second-last partition */ + for (i = host->nr_boot_partitions - 2; i >= 0; i--) { + boot_partition = &host->boot_partitions[i]; + start = boot_partition->page_offset; + end = start + boot_partition->page_size; + + if (page < end && page >= start) + return true; + } + + return false; +} + +static void qcom_nandc_codeword_fixup(struct qcom_nand_host *host, int page) +{ + bool codeword_fixup = qcom_nandc_is_boot_partition(host, page); + + /* Skip conf write if we are already in the correct mode */ + if (codeword_fixup == host->codeword_fixup) + return; + + host->codeword_fixup = codeword_fixup; + + host->cw_data = codeword_fixup ? 512 : 516; + host->spare_bytes = host->cw_size - host->ecc_bytes_hw - + host->bbm_size - host->cw_data; + + host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK); + host->cfg0 |= host->spare_bytes << SPARE_SIZE_BYTES | + host->cw_data << UD_SIZE_BYTES; + + host->ecc_bch_cfg &= ~ECC_NUM_DATA_BYTES_MASK; + host->ecc_bch_cfg |= host->cw_data << ECC_NUM_DATA_BYTES; + host->ecc_buf_cfg = (host->cw_data - 1) << NUM_STEPS; +} + /* implements ecc->read_page() */ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf, int oob_required, int page) @@ -2045,6 +2156,9 @@ static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf, struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); u8 *data_buf, *oob_buf = NULL; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + nand_read_page_op(chip, page, 0, NULL, 0); data_buf = buf; oob_buf = oob_required ? chip->oob_poi : NULL; @@ -2064,6 +2178,9 @@ static int qcom_nandc_read_page_raw(struct nand_chip *chip, uint8_t *buf, int cw, ret; u8 *data_buf = buf, *oob_buf = chip->oob_poi; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + for (cw = 0; cw < ecc->steps; cw++) { ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf, page, cw); @@ -2084,6 +2201,9 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page) struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); struct nand_ecc_ctrl *ecc = &chip->ecc; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + clear_read_regs(nandc); clear_bam_transaction(nandc); @@ -2104,6 +2224,9 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf, u8 *data_buf, *oob_buf; int i, ret; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + nand_prog_page_begin_op(chip, page, 0, NULL, 0); clear_read_regs(nandc); @@ -2119,7 +2242,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const uint8_t *buf, for (i = 0; i < ecc->steps; i++) { int data_size, oob_size; - if (qcom_nandc_is_last_cw(ecc, i)) { + if (qcom_nandc_is_last_cw(ecc, i) && !host->codeword_fixup) { data_size = ecc->size - ((ecc->steps - 1) << 2); oob_size = (ecc->steps << 2) + host->ecc_bytes_hw + host->spare_bytes; @@ -2176,6 +2299,9 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip, u8 *data_buf, *oob_buf; int i, ret; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + nand_prog_page_begin_op(chip, page, 0, NULL, 0); clear_read_regs(nandc); clear_bam_transaction(nandc); @@ -2194,7 +2320,7 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip, data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1); oob_size1 = host->bbm_size; - if (qcom_nandc_is_last_cw(ecc, i)) { + if (qcom_nandc_is_last_cw(ecc, i) && !host->codeword_fixup) { data_size2 = ecc->size - data_size1 - ((ecc->steps - 1) << 2); oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw + @@ -2254,6 +2380,9 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page) int data_size, oob_size; int ret; + if (host->nr_boot_partitions) + qcom_nandc_codeword_fixup(host, page); + host->use_ecc = true; clear_bam_transaction(nandc); @@ -2915,6 +3044,74 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc) static const char * const probes[] = { "cmdlinepart", "ofpart", "qcomsmem", NULL }; +static int qcom_nand_host_parse_boot_partitions(struct qcom_nand_controller *nandc, + struct qcom_nand_host *host, + struct device_node *dn) +{ + struct nand_chip *chip = &host->chip; + struct mtd_info *mtd = nand_to_mtd(chip); + struct qcom_nand_boot_partition *boot_partition; + struct device *dev = nandc->dev; + int partitions_count, i, j, ret; + + if (!of_find_property(dn, "qcom,boot-partitions", NULL)) + return 0; + + partitions_count = of_property_count_u32_elems(dn, "qcom,boot-partitions"); + if (partitions_count <= 0) { + dev_err(dev, "Error parsing boot partition\n"); + return partitions_count ? partitions_count : -EINVAL; + } + + host->nr_boot_partitions = partitions_count / 2; + host->boot_partitions = devm_kcalloc(dev, host->nr_boot_partitions, + sizeof(*host->boot_partitions), GFP_KERNEL); + if (!host->boot_partitions) { + host->nr_boot_partitions = 0; + return -ENOMEM; + } + + for (i = 0, j = 0; i < host->nr_boot_partitions; i++, j += 2) { + boot_partition = &host->boot_partitions[i]; + + ret = of_property_read_u32_index(dn, "qcom,boot-partitions", j, + &boot_partition->page_offset); + if (ret) { + dev_err(dev, "Error parsing boot partition offset at index %d\n", i); + host->nr_boot_partitions = 0; + return ret; + } + + if (boot_partition->page_offset % mtd->writesize) { + dev_err(dev, "Boot partition offset not multiple of writesize at index %i\n", + i); + host->nr_boot_partitions = 0; + return -EINVAL; + } + /* Convert offset to nand pages */ + boot_partition->page_offset /= mtd->writesize; + + ret = of_property_read_u32_index(dn, "qcom,boot-partitions", j + 1, + &boot_partition->page_size); + if (ret) { + dev_err(dev, "Error parsing boot partition size at index %d\n", i); + host->nr_boot_partitions = 0; + return ret; + } + + if (boot_partition->page_size % mtd->writesize) { + dev_err(dev, "Boot partition size not multiple of writesize at index %i\n", + i); + host->nr_boot_partitions = 0; + return -EINVAL; + } + /* Convert size to nand pages */ + boot_partition->page_size /= mtd->writesize; + } + + return 0; +} + static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc, struct qcom_nand_host *host, struct device_node *dn) @@ -2972,6 +3169,14 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc, if (ret) nand_cleanup(chip); + if (nandc->props->use_codeword_fixup) { + ret = qcom_nand_host_parse_boot_partitions(nandc, host, dn); + if (ret) { + nand_cleanup(chip); + return ret; + } + } + return ret; } @@ -3137,6 +3342,7 @@ static int qcom_nandc_remove(struct platform_device *pdev) static const struct qcom_nandc_props ipq806x_nandc_props = { .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT), .is_bam = false, + .use_codeword_fixup = true, .dev_cmd_reg_start = 0x0, }; diff --git a/drivers/mtd/nand/raw/sm_common.c b/drivers/mtd/nand/raw/sm_common.c index ba24cb36d0b9..b2b42dd1a2de 100644 --- a/drivers/mtd/nand/raw/sm_common.c +++ b/drivers/mtd/nand/raw/sm_common.c @@ -52,7 +52,7 @@ static const struct mtd_ooblayout_ops oob_sm_ops = { .free = oob_sm_ooblayout_free, }; -/* NOTE: This layout is is not compatabable with SmartMedia, */ +/* NOTE: This layout is not compatabable with SmartMedia, */ /* because the 256 byte devices have page depenent oob layout */ /* However it does preserve the bad block markers */ /* If you use smftl, it will bypass this and work correctly */ diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c index b36e5260ae27..e12f9f580a15 100644 --- a/drivers/mtd/nand/raw/tegra_nand.c +++ b/drivers/mtd/nand/raw/tegra_nand.c @@ -1223,11 +1223,8 @@ static int tegra_nand_remove(struct platform_device *pdev) struct tegra_nand_controller *ctrl = platform_get_drvdata(pdev); struct nand_chip *chip = ctrl->chip; struct mtd_info *mtd = nand_to_mtd(chip); - int ret; - ret = mtd_device_unregister(mtd); - if (ret) - return ret; + WARN_ON(mtd_device_unregister(mtd)); nand_cleanup(chip); diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile index 80dabe6ff0f3..b520fe634041 100644 --- a/drivers/mtd/nand/spi/Makefile +++ b/drivers/mtd/nand/spi/Makefile @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 -spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o +spinand-objs := core.o ato.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o obj-$(CONFIG_MTD_SPI_NAND) += spinand.o diff --git a/drivers/mtd/nand/spi/ato.c b/drivers/mtd/nand/spi/ato.c new file mode 100644 index 000000000000..82b377c06812 --- /dev/null +++ b/drivers/mtd/nand/spi/ato.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Aidan MacDonald + * + * Author: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> + */ + +#include <linux/device.h> +#include <linux/kernel.h> +#include <linux/mtd/spinand.h> + + +#define SPINAND_MFR_ATO 0x9b + + +static SPINAND_OP_VARIANTS(read_cache_variants, + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); + +static SPINAND_OP_VARIANTS(write_cache_variants, + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), + SPINAND_PROG_LOAD(true, 0, NULL, 0)); + +static SPINAND_OP_VARIANTS(update_cache_variants, + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), + SPINAND_PROG_LOAD(false, 0, NULL, 0)); + + +static int ato25d1ga_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + region->offset = (16 * section) + 8; + region->length = 8; + return 0; +} + +static int ato25d1ga_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *region) +{ + if (section > 3) + return -ERANGE; + + if (section) { + region->offset = (16 * section); + region->length = 8; + } else { + /* first byte of section 0 is reserved for the BBM */ + region->offset = 1; + region->length = 7; + } + + return 0; +} + +static const struct mtd_ooblayout_ops ato25d1ga_ooblayout = { + .ecc = ato25d1ga_ooblayout_ecc, + .free = ato25d1ga_ooblayout_free, +}; + + +static const struct spinand_info ato_spinand_table[] = { + SPINAND_INFO("ATO25D1GA", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x12), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(1, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&ato25d1ga_ooblayout, NULL)), +}; + +static const struct spinand_manufacturer_ops ato_spinand_manuf_ops = { +}; + +const struct spinand_manufacturer ato_spinand_manufacturer = { + .id = SPINAND_MFR_ATO, + .name = "ATO", + .chips = ato_spinand_table, + .nchips = ARRAY_SIZE(ato_spinand_table), + .ops = &ato_spinand_manuf_ops, +}; diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index d5b685d1605e..9d73910a7ae8 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -927,6 +927,7 @@ static const struct nand_ops spinand_ops = { }; static const struct spinand_manufacturer *spinand_manufacturers[] = { + &ato_spinand_manufacturer, &gigadevice_spinand_manufacturer, ¯onix_spinand_manufacturer, µn_spinand_manufacturer, diff --git a/drivers/mtd/parsers/Kconfig b/drivers/mtd/parsers/Kconfig index 23763d16e4f9..b43df73927a0 100644 --- a/drivers/mtd/parsers/Kconfig +++ b/drivers/mtd/parsers/Kconfig @@ -186,3 +186,12 @@ config MTD_QCOMSMEM_PARTS help This provides support for parsing partitions from Shared Memory (SMEM) for NAND and SPI flash on Qualcomm platforms. + +config MTD_SERCOMM_PARTS + tristate "Sercomm partition table parser" + depends on MTD && RALINK + help + This provides partitions table parser for devices with Sercomm + partition map. This partition table contains real partition + offsets, which may differ from device to device depending on the + number and location of bad blocks on NAND. diff --git a/drivers/mtd/parsers/Makefile b/drivers/mtd/parsers/Makefile index 2e98aa048278..2fcf0ab9e7da 100644 --- a/drivers/mtd/parsers/Makefile +++ b/drivers/mtd/parsers/Makefile @@ -10,6 +10,7 @@ ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o obj-$(CONFIG_MTD_AFS_PARTS) += afs.o obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o +obj-$(CONFIG_MTD_SERCOMM_PARTS) += scpart.o obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o obj-$(CONFIG_MTD_QCOMSMEM_PARTS) += qcomsmempart.o diff --git a/drivers/mtd/parsers/ofpart_bcm4908.c b/drivers/mtd/parsers/ofpart_bcm4908.c index 0eddef4c198e..bb072a0940e4 100644 --- a/drivers/mtd/parsers/ofpart_bcm4908.c +++ b/drivers/mtd/parsers/ofpart_bcm4908.c @@ -35,12 +35,15 @@ static long long bcm4908_partitions_fw_offset(void) err = kstrtoul(s + len + 1, 0, &offset); if (err) { pr_err("failed to parse %s\n", s + len + 1); + of_node_put(root); return err; } + of_node_put(root); return offset << 10; } + of_node_put(root); return -ENOENT; } diff --git a/drivers/mtd/parsers/redboot.c b/drivers/mtd/parsers/redboot.c index feb44a573d44..a16b42a88581 100644 --- a/drivers/mtd/parsers/redboot.c +++ b/drivers/mtd/parsers/redboot.c @@ -58,6 +58,7 @@ static void parse_redboot_of(struct mtd_info *master) return; ret = of_property_read_u32(npart, "fis-index-block", &dirblock); + of_node_put(npart); if (ret) return; diff --git a/drivers/mtd/parsers/scpart.c b/drivers/mtd/parsers/scpart.c new file mode 100644 index 000000000000..02601bb33de4 --- /dev/null +++ b/drivers/mtd/parsers/scpart.c @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * drivers/mtd/scpart.c: Sercomm Partition Parser + * + * Copyright (C) 2018 NOGUCHI Hiroshi + * Copyright (C) 2022 Mikhail Zhilkin + */ + +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/module.h> + +#define MOD_NAME "scpart" + +#ifdef pr_fmt +#undef pr_fmt +#endif + +#define pr_fmt(fmt) MOD_NAME ": " fmt + +#define ID_ALREADY_FOUND 0xffffffffUL + +#define MAP_OFFS_IN_BLK 0x800 +#define MAP_MIRROR_NUM 2 + +static const char sc_part_magic[] = { + 'S', 'C', 'F', 'L', 'M', 'A', 'P', 'O', 'K', '\0', +}; +#define PART_MAGIC_LEN sizeof(sc_part_magic) + +/* assumes that all fields are set by CPU native endian */ +struct sc_part_desc { + uint32_t part_id; + uint32_t part_offs; + uint32_t part_bytes; +}; + +static uint32_t scpart_desc_is_valid(struct sc_part_desc *pdesc) +{ + return ((pdesc->part_id != 0xffffffffUL) && + (pdesc->part_offs != 0xffffffffUL) && + (pdesc->part_bytes != 0xffffffffUL)); +} + +static int scpart_scan_partmap(struct mtd_info *master, loff_t partmap_offs, + struct sc_part_desc **ppdesc) +{ + int cnt = 0; + int res = 0; + int res2; + loff_t offs; + size_t retlen; + struct sc_part_desc *pdesc = NULL; + struct sc_part_desc *tmpdesc; + uint8_t *buf; + + buf = kzalloc(master->erasesize, GFP_KERNEL); + if (!buf) { + res = -ENOMEM; + goto out; + } + + res2 = mtd_read(master, partmap_offs, master->erasesize, &retlen, buf); + if (res2 || retlen != master->erasesize) { + res = -EIO; + goto free; + } + + for (offs = MAP_OFFS_IN_BLK; + offs < master->erasesize - sizeof(*tmpdesc); + offs += sizeof(*tmpdesc)) { + tmpdesc = (struct sc_part_desc *)&buf[offs]; + if (!scpart_desc_is_valid(tmpdesc)) + break; + cnt++; + } + + if (cnt > 0) { + int bytes = cnt * sizeof(*pdesc); + + pdesc = kcalloc(cnt, sizeof(*pdesc), GFP_KERNEL); + if (!pdesc) { + res = -ENOMEM; + goto free; + } + memcpy(pdesc, &(buf[MAP_OFFS_IN_BLK]), bytes); + + *ppdesc = pdesc; + res = cnt; + } + +free: + kfree(buf); + +out: + return res; +} + +static int scpart_find_partmap(struct mtd_info *master, + struct sc_part_desc **ppdesc) +{ + int magic_found = 0; + int res = 0; + int res2; + loff_t offs = 0; + size_t retlen; + uint8_t rdbuf[PART_MAGIC_LEN]; + + while ((magic_found < MAP_MIRROR_NUM) && + (offs < master->size) && + !mtd_block_isbad(master, offs)) { + res2 = mtd_read(master, offs, PART_MAGIC_LEN, &retlen, rdbuf); + if (res2 || retlen != PART_MAGIC_LEN) { + res = -EIO; + goto out; + } + if (!memcmp(rdbuf, sc_part_magic, PART_MAGIC_LEN)) { + pr_debug("Signature found at 0x%llx\n", offs); + magic_found++; + res = scpart_scan_partmap(master, offs, ppdesc); + if (res > 0) + goto out; + } + offs += master->erasesize; + } + +out: + if (res > 0) + pr_info("Valid 'SC PART MAP' (%d partitions) found at 0x%llx\n", res, offs); + else + pr_info("No valid 'SC PART MAP' was found\n"); + + return res; +} + +static int scpart_parse(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +{ + const char *partname; + int n; + int nr_scparts; + int nr_parts = 0; + int res = 0; + struct sc_part_desc *scpart_map = NULL; + struct mtd_partition *parts = NULL; + struct device_node *mtd_node; + struct device_node *ofpart_node; + struct device_node *pp; + + mtd_node = mtd_get_of_node(master); + if (!mtd_node) { + res = -ENOENT; + goto out; + } + + ofpart_node = of_get_child_by_name(mtd_node, "partitions"); + if (!ofpart_node) { + pr_info("%s: 'partitions' subnode not found on %pOF.\n", + master->name, mtd_node); + res = -ENOENT; + goto out; + } + + nr_scparts = scpart_find_partmap(master, &scpart_map); + if (nr_scparts <= 0) { + pr_info("No any partitions was found in 'SC PART MAP'.\n"); + res = -ENOENT; + goto free; + } + + parts = kcalloc(of_get_child_count(ofpart_node), sizeof(*parts), + GFP_KERNEL); + if (!parts) { + res = -ENOMEM; + goto free; + } + + for_each_child_of_node(ofpart_node, pp) { + u32 scpart_id; + + if (of_property_read_u32(pp, "sercomm,scpart-id", &scpart_id)) + continue; + + for (n = 0 ; n < nr_scparts ; n++) + if ((scpart_map[n].part_id != ID_ALREADY_FOUND) && + (scpart_id == scpart_map[n].part_id)) + break; + if (n >= nr_scparts) + /* not match */ + continue; + + /* add the partition found in OF into MTD partition array */ + parts[nr_parts].offset = scpart_map[n].part_offs; + parts[nr_parts].size = scpart_map[n].part_bytes; + parts[nr_parts].of_node = pp; + + if (!of_property_read_string(pp, "label", &partname)) + parts[nr_parts].name = partname; + if (of_property_read_bool(pp, "read-only")) + parts[nr_parts].mask_flags |= MTD_WRITEABLE; + if (of_property_read_bool(pp, "lock")) + parts[nr_parts].mask_flags |= MTD_POWERUP_LOCK; + + /* mark as 'done' */ + scpart_map[n].part_id = ID_ALREADY_FOUND; + + nr_parts++; + } + + if (nr_parts > 0) { + *pparts = parts; + res = nr_parts; + } else + pr_info("No partition in OF matches partition ID with 'SC PART MAP'.\n"); + + of_node_put(pp); + +free: + of_node_put(ofpart_node); + kfree(scpart_map); + if (res <= 0) + kfree(parts); + +out: + return res; +} + +static const struct of_device_id scpart_parser_of_match_table[] = { + { .compatible = "sercomm,sc-partitions" }, + {}, +}; +MODULE_DEVICE_TABLE(of, scpart_parser_of_match_table); + +static struct mtd_part_parser scpart_parser = { + .parse_fn = scpart_parse, + .name = "scpart", + .of_match_table = scpart_parser_of_match_table, +}; +module_mtd_part_parser(scpart_parser); + +/* mtd parsers will request the module by parser name */ +MODULE_ALIAS("scpart"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("NOGUCHI Hiroshi <drvlabo@gmail.com>"); +MODULE_AUTHOR("Mikhail Zhilkin <csharper2005@gmail.com>"); +MODULE_DESCRIPTION("Sercomm partition parser"); diff --git a/drivers/mtd/sm_ftl.c b/drivers/mtd/sm_ftl.c index 0cff2cda1b5a..7f955fade838 100644 --- a/drivers/mtd/sm_ftl.c +++ b/drivers/mtd/sm_ftl.c @@ -1111,9 +1111,9 @@ static void sm_release(struct mtd_blktrans_dev *dev) { struct sm_ftl *ftl = dev->priv; - mutex_lock(&ftl->mutex); del_timer_sync(&ftl->timer); cancel_work_sync(&ftl->flush_work); + mutex_lock(&ftl->mutex); sm_cache_flush(ftl); mutex_unlock(&ftl->mutex); } |