diff options
Diffstat (limited to 'drivers/net/phy')
| -rw-r--r-- | drivers/net/phy/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/net/phy/broadcom.c | 77 | ||||
| -rw-r--r-- | drivers/net/phy/davicom.c | 17 | ||||
| -rw-r--r-- | drivers/net/phy/fixed.c | 2 | ||||
| -rw-r--r-- | drivers/net/phy/marvell.c | 131 | ||||
| -rw-r--r-- | drivers/net/phy/mdio_bus.c | 4 | ||||
| -rw-r--r-- | drivers/net/phy/phy_device.c | 38 |
7 files changed, 247 insertions, 23 deletions
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index f4ca0591231d..3ac8529bb92c 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -67,6 +67,7 @@ config REALTEK_PHY config FIXED_PHY bool "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs" + depends on PHYLIB=y ---help--- Adds the platform "fixed" MDIO Bus to cover the boards that use PHYs that are not connected to the real MDIO bus. diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c index 5b80358af658..60c5cfe96918 100644 --- a/drivers/net/phy/broadcom.c +++ b/drivers/net/phy/broadcom.c @@ -99,6 +99,41 @@ static int bcm54xx_config_intr(struct phy_device *phydev) return err; } +static int bcm5481_config_aneg(struct phy_device *phydev) +{ + int ret; + + /* Aneg firsly. */ + ret = genphy_config_aneg(phydev); + + /* Then we can set up the delay. */ + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { + u16 reg; + + /* + * There is no BCM5481 specification available, so down + * here is everything we know about "register 0x18". This + * at least helps BCM5481 to successfuly receive packets + * on MPC8360E-RDK board. Peter Barada <peterb@logicpd.com> + * says: "This sets delay between the RXD and RXC signals + * instead of using trace lengths to achieve timing". + */ + + /* Set RDX clk delay. */ + reg = 0x7 | (0x7 << 12); + phy_write(phydev, 0x18, reg); + + reg = phy_read(phydev, 0x18); + /* Set RDX-RXC skew. */ + reg |= (1 << 8); + /* Write bits 14:0. */ + reg |= (1 << 15); + phy_write(phydev, 0x18, reg); + } + + return ret; +} + static struct phy_driver bcm5411_driver = { .phy_id = 0x00206070, .phy_id_mask = 0xfffffff0, @@ -141,8 +176,36 @@ static struct phy_driver bcm5461_driver = { .driver = { .owner = THIS_MODULE }, }; +static struct phy_driver bcm5464_driver = { + .phy_id = 0x002060b0, + .phy_id_mask = 0xfffffff0, + .name = "Broadcom BCM5464", + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, + .config_init = bcm54xx_config_init, + .config_aneg = genphy_config_aneg, + .read_status = genphy_read_status, + .ack_interrupt = bcm54xx_ack_interrupt, + .config_intr = bcm54xx_config_intr, + .driver = { .owner = THIS_MODULE }, +}; + +static struct phy_driver bcm5481_driver = { + .phy_id = 0x0143bca0, + .phy_id_mask = 0xfffffff0, + .name = "Broadcom BCM5481", + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, + .config_init = bcm54xx_config_init, + .config_aneg = bcm5481_config_aneg, + .read_status = genphy_read_status, + .ack_interrupt = bcm54xx_ack_interrupt, + .config_intr = bcm54xx_config_intr, + .driver = { .owner = THIS_MODULE }, +}; + static struct phy_driver bcm5482_driver = { - .phy_id = 0x0143bcb0, + .phy_id = 0x0143bcb0, .phy_id_mask = 0xfffffff0, .name = "Broadcom BCM5482", .features = PHY_GBIT_FEATURES, @@ -168,12 +231,22 @@ static int __init broadcom_init(void) ret = phy_driver_register(&bcm5461_driver); if (ret) goto out_5461; + ret = phy_driver_register(&bcm5464_driver); + if (ret) + goto out_5464; + ret = phy_driver_register(&bcm5481_driver); + if (ret) + goto out_5481; ret = phy_driver_register(&bcm5482_driver); if (ret) goto out_5482; return ret; out_5482: + phy_driver_unregister(&bcm5481_driver); +out_5481: + phy_driver_unregister(&bcm5464_driver); +out_5464: phy_driver_unregister(&bcm5461_driver); out_5461: phy_driver_unregister(&bcm5421_driver); @@ -186,6 +259,8 @@ out_5411: static void __exit broadcom_exit(void) { phy_driver_unregister(&bcm5482_driver); + phy_driver_unregister(&bcm5481_driver); + phy_driver_unregister(&bcm5464_driver); phy_driver_unregister(&bcm5461_driver); phy_driver_unregister(&bcm5421_driver); phy_driver_unregister(&bcm5411_driver); diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c index 7ed632db00d7..d926168bc780 100644 --- a/drivers/net/phy/davicom.c +++ b/drivers/net/phy/davicom.c @@ -37,6 +37,7 @@ #define MII_DM9161_SCR 0x10 #define MII_DM9161_SCR_INIT 0x0610 +#define MII_DM9161_SCR_RMII 0x0100 /* DM9161 Interrupt Register */ #define MII_DM9161_INTR 0x15 @@ -103,7 +104,7 @@ static int dm9161_config_aneg(struct phy_device *phydev) static int dm9161_config_init(struct phy_device *phydev) { - int err; + int err, temp; /* Isolate the PHY */ err = phy_write(phydev, MII_BMCR, BMCR_ISOLATE); @@ -111,9 +112,19 @@ static int dm9161_config_init(struct phy_device *phydev) if (err < 0) return err; - /* Do not bypass the scrambler/descrambler */ - err = phy_write(phydev, MII_DM9161_SCR, MII_DM9161_SCR_INIT); + switch (phydev->interface) { + case PHY_INTERFACE_MODE_MII: + temp = MII_DM9161_SCR_INIT; + break; + case PHY_INTERFACE_MODE_RMII: + temp = MII_DM9161_SCR_INIT | MII_DM9161_SCR_RMII; + break; + default: + return -EINVAL; + } + /* Do not bypass the scrambler/descrambler */ + err = phy_write(phydev, MII_DM9161_SCR, temp); if (err < 0) return err; diff --git a/drivers/net/phy/fixed.c b/drivers/net/phy/fixed.c index ca9b040f9ad9..4e07956a483b 100644 --- a/drivers/net/phy/fixed.c +++ b/drivers/net/phy/fixed.c @@ -213,7 +213,7 @@ static int __init fixed_mdio_bus_init(void) goto err_pdev; } - fmb->mii_bus.id = 0; + snprintf(fmb->mii_bus.id, MII_BUS_ID_SIZE, "0"); fmb->mii_bus.name = "Fixed MDIO Bus"; fmb->mii_bus.dev = &pdev->dev; fmb->mii_bus.read = &fixed_mdio_read; diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index f0574073a2a3..32a8503a7acd 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -58,9 +58,25 @@ #define MII_M1111_RX_DELAY 0x80 #define MII_M1111_TX_DELAY 0x2 #define MII_M1111_PHY_EXT_SR 0x1b -#define MII_M1111_HWCFG_MODE_MASK 0xf -#define MII_M1111_HWCFG_MODE_RGMII 0xb + +#define MII_M1111_HWCFG_MODE_MASK 0xf +#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb +#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4 +#define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000 +#define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000 + +#define MII_M1111_COPPER 0 +#define MII_M1111_FIBER 1 + +#define MII_M1011_PHY_STATUS 0x11 +#define MII_M1011_PHY_STATUS_1000 0x8000 +#define MII_M1011_PHY_STATUS_100 0x4000 +#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000 +#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000 +#define MII_M1011_PHY_STATUS_RESOLVED 0x0800 +#define MII_M1011_PHY_STATUS_LINK 0x0400 + MODULE_DESCRIPTION("Marvell PHY driver"); MODULE_AUTHOR("Andy Fleming"); @@ -141,12 +157,22 @@ static int marvell_config_aneg(struct phy_device *phydev) static int m88e1111_config_init(struct phy_device *phydev) { int err; + int temp; + int mode; + + /* Enable Fiber/Copper auto selection */ + temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); + temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO; + phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); + + temp = phy_read(phydev, MII_BMCR); + temp |= BMCR_RESET; + phy_write(phydev, MII_BMCR, temp); if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) || (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { - int temp; temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); if (temp < 0) @@ -171,7 +197,13 @@ static int m88e1111_config_init(struct phy_device *phydev) return temp; temp &= ~(MII_M1111_HWCFG_MODE_MASK); - temp |= MII_M1111_HWCFG_MODE_RGMII; + + mode = phy_read(phydev, MII_M1111_PHY_EXT_CR); + + if (mode & MII_M1111_HWCFG_FIBER_COPPER_RES) + temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII; + else + temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII; err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); if (err < 0) @@ -179,8 +211,6 @@ static int m88e1111_config_init(struct phy_device *phydev) } if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { - int temp; - temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); if (temp < 0) return temp; @@ -262,6 +292,93 @@ static int m88e1145_config_init(struct phy_device *phydev) return 0; } +/* marvell_read_status + * + * Generic status code does not detect Fiber correctly! + * Description: + * Check the link, then figure out the current state + * by comparing what we advertise with what the link partner + * advertises. Start by checking the gigabit possibilities, + * then move on to 10/100. + */ +static int marvell_read_status(struct phy_device *phydev) +{ + int adv; + int err; + int lpa; + int status = 0; + + /* Update the link, but return if there + * was an error */ + err = genphy_update_link(phydev); + if (err) + return err; + + if (AUTONEG_ENABLE == phydev->autoneg) { + status = phy_read(phydev, MII_M1011_PHY_STATUS); + if (status < 0) + return status; + + lpa = phy_read(phydev, MII_LPA); + if (lpa < 0) + return lpa; + + adv = phy_read(phydev, MII_ADVERTISE); + if (adv < 0) + return adv; + + lpa &= adv; + + if (status & MII_M1011_PHY_STATUS_FULLDUPLEX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + status = status & MII_M1011_PHY_STATUS_SPD_MASK; + phydev->pause = phydev->asym_pause = 0; + + switch (status) { + case MII_M1011_PHY_STATUS_1000: + phydev->speed = SPEED_1000; + break; + + case MII_M1011_PHY_STATUS_100: + phydev->speed = SPEED_100; + break; + + default: + phydev->speed = SPEED_10; + break; + } + + if (phydev->duplex == DUPLEX_FULL) { + phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0; + phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0; + } + } else { + int bmcr = phy_read(phydev, MII_BMCR); + + if (bmcr < 0) + return bmcr; + + if (bmcr & BMCR_FULLDPLX) + phydev->duplex = DUPLEX_FULL; + else + phydev->duplex = DUPLEX_HALF; + + if (bmcr & BMCR_SPEED1000) + phydev->speed = SPEED_1000; + else if (bmcr & BMCR_SPEED100) + phydev->speed = SPEED_100; + else + phydev->speed = SPEED_10; + + phydev->pause = phydev->asym_pause = 0; + } + + return 0; +} + static struct phy_driver marvell_drivers[] = { { .phy_id = 0x01410c60, @@ -296,7 +413,7 @@ static struct phy_driver marvell_drivers[] = { .flags = PHY_HAS_INTERRUPT, .config_init = &m88e1111_config_init, .config_aneg = &marvell_config_aneg, - .read_status = &genphy_read_status, + .read_status = &marvell_read_status, .ack_interrupt = &marvell_ack_interrupt, .config_intr = &marvell_config_intr, .driver = { .owner = THIS_MODULE }, diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c index 6e9f619c491f..963630c65ca9 100644 --- a/drivers/net/phy/mdio_bus.c +++ b/drivers/net/phy/mdio_bus.c @@ -49,13 +49,13 @@ int mdiobus_register(struct mii_bus *bus) int i; int err = 0; - mutex_init(&bus->mdio_lock); - if (NULL == bus || NULL == bus->name || NULL == bus->read || NULL == bus->write) return -EINVAL; + mutex_init(&bus->mdio_lock); + if (bus->reset) bus->reset(bus); diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index f4c4fd85425f..8b1121b02f98 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -86,35 +86,55 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) EXPORT_SYMBOL(phy_device_create); /** - * get_phy_device - reads the specified PHY device and returns its @phy_device struct + * get_phy_id - reads the specified addr for its ID. * @bus: the target MII bus * @addr: PHY address on the MII bus + * @phy_id: where to store the ID retrieved. * * Description: Reads the ID registers of the PHY at @addr on the - * @bus, then allocates and returns the phy_device to represent it. + * @bus, stores it in @phy_id and returns zero on success. */ -struct phy_device * get_phy_device(struct mii_bus *bus, int addr) +int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id) { int phy_reg; - u32 phy_id; - struct phy_device *dev = NULL; /* Grab the bits from PHYIR1, and put them * in the upper half */ phy_reg = bus->read(bus, addr, MII_PHYSID1); if (phy_reg < 0) - return ERR_PTR(phy_reg); + return -EIO; - phy_id = (phy_reg & 0xffff) << 16; + *phy_id = (phy_reg & 0xffff) << 16; /* Grab the bits from PHYIR2, and put them in the lower half */ phy_reg = bus->read(bus, addr, MII_PHYSID2); if (phy_reg < 0) - return ERR_PTR(phy_reg); + return -EIO; + + *phy_id |= (phy_reg & 0xffff); + + return 0; +} + +/** + * get_phy_device - reads the specified PHY device and returns its @phy_device struct + * @bus: the target MII bus + * @addr: PHY address on the MII bus + * + * Description: Reads the ID registers of the PHY at @addr on the + * @bus, then allocates and returns the phy_device to represent it. + */ +struct phy_device * get_phy_device(struct mii_bus *bus, int addr) +{ + struct phy_device *dev = NULL; + u32 phy_id; + int r; - phy_id |= (phy_reg & 0xffff); + r = get_phy_id(bus, addr, &phy_id); + if (r) + return ERR_PTR(r); /* If the phy_id is all Fs, there is no device there */ if (0xffffffff == phy_id) |