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path: root/drivers/watchdog/rzg2l_wdt.c
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Diffstat (limited to 'drivers/watchdog/rzg2l_wdt.c')
-rw-r--r--drivers/watchdog/rzg2l_wdt.c20
1 files changed, 18 insertions, 2 deletions
diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 2a35f890a288..11bbe48160ec 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/units.h>
@@ -166,8 +167,22 @@ static int rzg2l_wdt_restart(struct watchdog_device *wdev,
struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
int ret;
- clk_prepare_enable(priv->pclk);
- clk_prepare_enable(priv->osc_clk);
+ /*
+ * In case of RZ/G3S the watchdog device may be part of an IRQ safe power
+ * domain that is currently powered off. In this case we need to power
+ * it on before accessing registers. Along with this the clocks will be
+ * enabled. We don't undo the pm_runtime_resume_and_get() as the device
+ * need to be on for the reboot to happen.
+ *
+ * For the rest of SoCs not registering a watchdog IRQ safe power
+ * domain it is safe to call pm_runtime_resume_and_get() as the
+ * irq_safe_dev_in_sleep_domain() call in genpd_runtime_resume()
+ * returns non zero value and the genpd_lock() is avoided, thus, there
+ * will be no invalid wait context reported by lockdep.
+ */
+ ret = pm_runtime_resume_and_get(wdev->parent);
+ if (ret)
+ return ret;
if (priv->devtype == WDT_RZG2L) {
ret = reset_control_deassert(priv->rstc);
@@ -275,6 +290,7 @@ static int rzg2l_wdt_probe(struct platform_device *pdev)
priv->devtype = (uintptr_t)of_device_get_match_data(dev);
+ pm_runtime_irq_safe(&pdev->dev);
pm_runtime_enable(&pdev->dev);
priv->wdev.info = &rzg2l_wdt_ident;