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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Pull "Allwinner dts changes for 4.14" from Chen-Yu Tsai:
The usual improvement patches:
- R_INTC interrupt controller compatible string update and device node
addition
- Battery charger enabled on the Cubietruck
- New board: Bananapi M2 Magic
- Ethernet and USB OTG enabled on the Beelink X2
- MMC enabled for A83T boards
* tag 'sunxi-dt-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a83t: h8homlet: Enable micro-SD card and onboard eMMC
ARM: dts: sun8i: a83t: cubietruck-plus: Enable micro-SD card and eMMC
ARM: dts: sun8i: a83t: Add pingroup for 8-bit eMMC on mmc2
ARM: dts: sun8i: a83t: Add MMC controller device nodes
ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2
ARM: dts: sun8i: h3: Enable USB OTG on the Beelink X2
ARM: dts: sun8i: Add BananaPI M2-Magic DTS
ARM: dts: sun7i: enable battery power supply subnode on cubietruck
ARM: dts: sun8i: a83t: Add device node for R_INTC interrupt controller
ARM: dts: sun8i: a23/a33: Use new sun6i-a31-r-intc compatible for NMI/R_INTC
ARM: dts: sun6i: a31: Use new sun6i-a31-r-intc compatible for NMI/R_INTC
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "Rockchip dts32 changes for 4.14" from Heiko Stübner:
Removal of the deprectated num-slots property from all Rockchip dw-mmc
nodes. The rv1108 gains support for sd-cards on the evaluation board and
the general nodes get a bit of cosmetic. On rk3288 the evb gains support
saradc and the adc-key connected to it while some more boards also get
their mali gpu enabled (fennec, evb, tinker).
The biggest set of changes can be found on the rk3228/rk3229 combo this
time. It gets core support for efuse, sdmmc, sdio, io-domans and spdif
as well as a separate rk3229.dtsi that will keep the slight differences
between the two brothers rk3228/rk3229. The evaluation board also gets
some attention and abled nodes (regulators, io-domains, emmc, tsadc keys)
But I think the most interesting change is the cpu enable-method for it.
Instead of using the older in-kernel method, we're now also moving to
handling this in firmware via the psci interface on 32bit Rockchip socs.
In a recently merged pull request [0] support for the rk3228/rk3229 was
added to OP-TEE including the psci support and it seems supporting other
32bit Rockchip socs that way is also planned for the future.
[0] https://github.com/OP-TEE/optee_os/pull/1666
* tag 'v4.14-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (23 commits)
ARM: dts: rockchip: fix property-ordering in rv1108 mmc nodes
ARM: dts: rockchip: enable sdmmc for rv1108 evb
ARM: dts: rockchip: add efuse device node for rk3228
ARM: dts: rockchip: add gpio power-key for rk3229-evb
ARM: dts: rockchip: enable tsadc for rk3229-evb
ARM: dts: rockchip: enable eMMC for rk3229-evb
ARM: dts: rockchip: enable io-domain for rk3229-evb
ARM: dts: rockchip: add cpu-supply property for cpu node of rk3229-evb
ARM: dts: rockchip: add regulator nodes for rk3229-evb
ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC
ARM: dts: rockchip: fix compatible string for eMMC node of rk3228 SoC
ARM: dts: rockchip: add cpu enable method for rk3228 SoC
ARM: dts: rockchip: remove num-slots from all platforms
ARM: dts: rockchip: Add io-domain node for rk3228
ARM: dts: rockchip: add basic dtsi file for RK3229 SoC
ARM: dts: rockchip: enable adc key for rk3288-evb
ARM: dts: rockchip: enable saradc for rk3288-evb
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-fennec
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-evb
ARM: dts: rockchip: enable ARM Mali GPU on rk3288-tinker
...
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Pull "Renesas ARM Based SoC DT Updates for v4.14" from Simon Horman:
Changes of note:
* Add pin controller support to the RZ/G1M (r8a7743) SoC and
RZ/A1 (r7s72100) SoCs now that the driver is available in v4.13-rc1.
* Add GPIO support to the RZ/G1M (r8a7743) SoC now that the driver
is availabe in v4.13-rc1.
* Enable MMCIF0 and Ethernet AVB support on the RZ/G1M (r8a7743) SoC and
the iWave-RZG1M-20M Qseven SOM. This depends on newly added pin
controller support noted above.
* Use R-Car Gen 2 fallback binding for vin nodes
This makes binding use consistent across R-Car Gen 2 SoCs.
It does not have any run-time effect
* Use SMP jump stub SRAM region from DT on R-Car Gen 2 SoCs
Geert Uytterhoeven says, "The R-Car Gen2 platform code for CPU core
bringup needs to copy a jump stub to on-SoC SRAM. Currently it uses a
hardcoded address pointing to ICRAM1."
* Add Inter Connect RAM to R-Car Gen 2 and RZ/G1 SoCs
Geert Uytterhoeven says, "R-Car Gen2 and RZ/G1 SoCs contain two or three
blocks of SRAM, which can be used for several purposes. One such purpose
is holding a jump stub for CPU core bringup."
* Use generic compatible string for I2C EEPROM for RZ/A1 (r7s72100) SoC
and koelsch board.
This is part of a tree-wide cleanup by Javier Martinez Canillas
* tag 'renesas-dt-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (38 commits)
ARM: dts: iwg20m: Correct indentation of mmcif0 properties
ARM: dts: rskrza1: Add LED0 pin support
ARM: dts: rskrza1: Add SDHI1 pin group
ARM: dts: rskrza1: Add Ethernet pin group
ARM: dts: rskrza1: Add SCIF2 pin group
ARM: dts: genmai: Add ethernet pin group
ARM: dts: genmai: Add user led device nodes
ARM: dts: genmai: Add RIIC2 pin group
ARM: dts: genmai: Add SCIF2 pin group
ARM: dts: r7s72100: Add pin controller node
ARM: dts: iwg20m: Add MMCIF0 support
ARM: dts: r8a7794: Use R-Car Gen 2 fallback binding for vin nodes
ARM: dts: r8a7791: Use R-Car Gen 2 fallback binding for vin nodes
ARM: dts: r8a7790: Use R-Car Gen 2 fallback binding for vin nodes
ARM: dts: r8a7743: Add MMCIF0 support
ARM: dts: r8a7794: Reserve SRAM for the SMP jump stub
ARM: dts: r8a7793: Reserve SRAM for the SMP jump stub
ARM: dts: r8a7792: Reserve SRAM for the SMP jump stub
ARM: dts: r8a7791: Reserve SRAM for the SMP jump stub
ARM: dts: r8a7790: Reserve SRAM for the SMP jump stub
...
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git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
Pull "STM32 DT updates for v4.14, round 1" from Alexandre Torgue:
Highlights:
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-Add DMA support on STM32F746
-Add DMA support on STM32H743
-Add DAC support on STM32H743
-Add DAC support on STM32F429
-Add ADC support on STM32H743
-Enable ADC on stm32h743i-eval board
-Add CEC support on STM32F7xx MCUs
-Enable CEC on stm32f769-disco board
-Remove rdinit from stm32f4 boards
* tag 'stm32-dt-for-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Add DMA support for STM32H743 SoC
ARM: dts: stm32: Add DMA support for STM32F746 SoC
ARM: dts: stm32: enable ADC on stm32h743i-eval board
ARM: dts: stm32: add ADC support on stm32h743
ARM: dts: stm32: Add DAC support on stm32h743
ARM: dts: stm32: Add DAC support on stm32f429
ARM: dts: stm32: enable CEC for stm32f769 discovery
ARM: dts: stm32: add CEC for stm32f7 family
ARM: dts: stm32: reorder stm32h743 nodes
ARM: dts: stm32: Remove rdinit from bootargs on stm32f429-disco
ARM: dts: stm32: Remove rdinit from bootargs on stm32f429i-eval
ARM: dts: stm32: Remove rdinit from bootargs on stm32f469-disco
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DTS ARM changes for v4.13" from Krzysztof Kozłowski:
Remove deprecated and unneeded properties from Exynos boards.
* tag 'samsung-dt-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Remove num-slots from exynos platforms
ARM: dts: exynos: Remove the OF graph from DSI node
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Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra71-evm.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra72-evm-revc.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra72-evm.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74x SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am572x-idk.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra72x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra72 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am571x-idk.dts.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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AM572x IDK and AM571x IDK boards have equivalent
design of how SD card and eMMC are connected.
The two EVMs mainly differ in IOdelay configuration
needed (because of difference in SoC used).
Move the common properties to am57xx-idk-common.dtsi
file which is common for both EVMs.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am57xx-beagle-x15/am57xx-beagle-x15-revb1.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for dra74 SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in dra7-evm.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add pinmux configuration for MMC module including IODELAY
values suggested in the data manual for the various supported
modes.
IOdelay data for both silicon revision 1.1 and 2.0 is
added here.
The datamanual revisions used are:
* AM572x Silicon Revision 2.0: SPRS953B, Revised November 2016
* AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add pinmux configuration for MMC module including IODELAY
values suggested in the data manual for the various supported
modes.
IOdelay data for both silicon revision 1.0 and 2.0 is
added here.
The datamanual revisions used are:
* AM571x Silicon Revision 2.0: SPRS957D, Revised January 2017
* AM571x Silicon Revision 1.0: SPRS919M, Revised November 2017
* DRA71x : SPRS960B, Revised February 2017
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add NAND controller node to LD4, Pro4, sLD8, Pro5, and PXs2.
Set up pinctrl to enable 2 chip select lines except Pro4. The CS1
for Pro4 is multiplexed with other peripherals such as UART2, so
I did not enable it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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To include dt-bindings headers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Add the (previously omitted) Ether/PHY pin data to the SK-RZG1E board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add the (previously omitted) SCIF2 pin data to the SK-RZG1E board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Define the generic R8A7745 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add camera support to N900 dts. Also add a note about MMC & debugging.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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dra76-evm is a board based on TI's dra76 processor targeting
for infotainment systems. Adding support for this platform.
dra76-evm and dra7-evm has a similar layout except with few differences.
So create a dra7-evm-common.dtsi with similarities on dra76-evm and
dra7-evm. Include this common dtsi in both dra7-evm.dts and dra76-evm.dts
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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dra76 family is a high-performance, infotainment application
device, based on OMAP architecture on a 28-nm technology.
This contains most of the subsystems, peripherals that are
available on dra74, dra72 family. This SoC mainly features
Subsystems:
- 2 x Cortex-A15 with max speed of 1.8GHz
- 2 X DSP
- 2 X Cortex-M4 IPU
- ISS
- CAL
- DSS
- VPE
- VIP
Connectivity peripherals:
- 1 USB3.0 and 3 USB2.0 subsystems
- 2 x SATA
- 2 x PCI Express Gen2
- 3-port Gigabit ethernet switch
- 2 x CAN
- MCAN
Adding basic dts support for DRA76 family while reusing the
data available in dra7.dtsi, dra74x.dtsi.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add pcie1 dt node in order for the controller to operate in
endpoint mode. However since none of the dra7 based boards have
slots configured to operate in endpoint mode, keep EP mode
disabled.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add support for Moxa UC-8100-ME-T open platform
The UC-8100-ME-T computing platform is designed
for embedded data acquisition industrial applications
The features of UC-8100-ME-T series are:
* eMMC
* SPI flash
* SD slot
* 2x LAN
* 2 RS-232/422/485 ports, software-selectable
* Mini PCIe form factor with USB signal
* USB host
* EEPROM
* TPM
* Watchdog
* RTC
* User gpio-keys
* User LEDs
* User button
Signed-off-by: SZ Lin <sz.lin@moxa.com>
Acked-by: Rob Herring <robh@kernel.org>
[tony@atomide.com: fix unit adress as suggested by Rob]
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Currently the default method of prefetch polled shows the highest
possible read and write speed when minimal non NAND background
activity is being done. But it is also very CPU intensive to reach
these high speeds (CPU load of 99% via mtd performance tests). While
DMA prefetch only uses 50% of the CPU to achieve around 23% less in
top read and write performance.
However, as the non NAND CPU load increases the read and write
performance takes a large hit when using polled prefetch. Therefore,
prefetch dma mode ends up outperforming prefetch polled in general
"system level" test. So switch to using dma prefetch by default since
it is likely what most users would prefer.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Currently the default method of prefetch polled shows the highest
possible read and write speed when minimal non NAND background
activity is being done. But it is also very CPU intensive to reach
these high speeds (CPU load of 99% via mtd performance tests). While
DMA prefetch only uses 50% of the CPU to achieve around 23% less in
top read and write performance.
However, as the non NAND CPU load increases the read and write
performance takes a large hit when using polled prefetch. Therefore,
prefetch dma mode ends up outperforming prefetch polled in general
"system level" test. So switch to using dma prefetch by default since
it is likely what most users would prefer.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Currently the default method of prefetch polled shows the highest
possible read and write speed when minimal non NAND background
activity is being done. But it is also very CPU intensive to reach
these high speeds (CPU load of 99% via mtd performance tests). While
DMA prefetch only uses 50% of the CPU to achieve around 23% less in
top read and write performance.
However, as the non NAND CPU load increases the read and write
performance takes a large hit when using polled prefetch. Therefore,
prefetch dma mode ends up outperforming prefetch polled in general
"system level" test. So switch to using dma prefetch by default since
it is likely what most users would prefer.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add vibrator to Droid4's device tree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Set default mode for vaudio, which may be left in standby mode
if the system is booted via kexec from Android.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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All nodes inhert "interrupt-parent" property from root
node. Removed the aforementioned property from usbhsohci,
usbhsehci, ssi_port1, ssi_port2 nodes to avoid duplication.
Signed-off-by: Karthik Tummala <karthik@techveda.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Devices using an external encoder, ESD protection and level shifter
such as tpd12s015 or ip4791cz12 have the CEC pull in the encoder
chip. And on var-som-om44, there is external pull up resistor R30.
So the internal CEC pull-up resistor needs to be disabled as otherwise
the external and internal pull are parallel making the pull value
much smaller than intended. This leads into the CEC not working as
reported by Hans Verkuil <hverkuil@xs4all.nl>.
Reported-by: Hans Verkuil <hverkuil@xs4all.nl>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add support for onboard gpio buzzer. It works using
the gpio-beeper driver. Pinmux entries for GPIO
controlling the buzzer are also added.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This patch adds the missing 32-bit enable method for SMP on BCM2836 and
BCM2837. The BCM2837 already has an enabled method, but this one only
works for 64-bit.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Eric Anholt <eric@anholt.net>
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Add the I2C[0-5] devices to the r8a7743 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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This commit enables i2c recovery, supported by the i2c core subsystem.
It defines the required GPIOs for SDA and SCL lines.
Signed-off-by: Jose Alarcon <jose.alarcon@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Romain Perier <romain.perier@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the Toradex Apalis Evaluation Board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the Toradex Ixora V1.1 carrier board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Migrate to using functionally-reduced I2C master contained in the DWC
HDMI. Therefore drop the GPIO bitbanging based i2cddc definition and
modify resp. pinctrl.
While at it re-order the I2C aliases to start with the generic, followed
by the camera and concluded by the power I2C one.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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gen1_i2c comment
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Split the pinctrl property for usdhc1 into a 4-bit SD interface
and an extension to 8-bit. This is required to support both 8-bit
and 4-bit interface on usdhc1 as per the carrier board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The SD1 pinctrl-0 property is overridden but only the card detect pin
is muxed, the control and data signals are not referenced at all.
It worked because the bootloader muxed them to a sensible state though.
Fix this.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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A CMA memory pool reserved memory node is added, and is attached
to the DSP node through the 'memory-region' property on the K2G
ICE board. This area will be used for allocating virtio rings and
buffers. This node allows the DSP Memory Protection and Address
Extension (MPAX) module to be configured properly for the DSP
processor, and matches the values used on the other Keystone 2
boards for software compatibility.
The reserved memory node and the user DSP node are also marked
okay to enable the DSP on the K2G ICE board.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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A CMA memory pool reserved memory node is added, and is attached
to the DSP node through the 'memory-region' property on the K2G
EVM board. This area will be used for allocating virtio rings and
buffers. This node allows the DSP Memory Protection and Address
Extension (MPAX) module to be configured properly for the DSP
processor, and matches the values used on the other Keystone 2
boards for software compatibility.
The reserved memory node and the user DSP node are also marked
okay to enable the DSP on the 66AK2G EVM board.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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The Keystone 2 66AK2G SoC has a single TMS320C66x DSP Core
Subsystem (C66x CorePac), containing a C66x Fixed/Floating-Point
DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add
the DT node for this DSP processor sub-system.
The DT node has a new property 'power-domains' and no 'clocks'
properties, and uses slightly different property values for
'resets' compared to other Keystone 2 SoCs. The processor does
not have an MMU, and uses various IPC Generation registers and
shared memory for inter-processor communication. The alias with
a stem 'rproc' has also been added for the DSP, it provides a
fixed remoteproc id for the DSP processor.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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Add dra7 iodelay configuration.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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