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2023-05-24ARM: at91: pm: fix imbalanced reference counter for ethernet devicesClaudiu Beznea
The of_find_device_by_node() function is returning a struct platform_device object with the embedded struct device member's reference counter incremented. This needs to be dropped when done with the platform device returned by of_find_device_by_node(). at91_pm_eth_quirk_is_valid() calls of_find_device_by_node() on suspend and resume path. On suspend it calls of_find_device_by_node() and on resume and failure paths it drops the counter of struct platform_device::dev. In case ethernet device may not wakeup there is a put_device() on at91_pm_eth_quirk_is_valid() which is wrong as it colides with put_device() on resume path leading to the reference counter of struct device embedded in struct platform_device to be messed, stack trace to be displayed (after 5 consecutive suspend/resume cycles) and execution to hang. Along with this the error path of at91_pm_config_quirks() had been also adapted to decrement propertly the reference counter of struct device embedded in struct platform_device. Fixes: b7fc72c63399 ("ARM: at91: pm: add quirks for pm") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230518062511.2988500-1-claudiu.beznea@microchip.com
2022-10-11Merge tag 'pinctrl-v6.1-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "There is nothing exciting going on, no core changes, just a few drivers and cleanups. New drivers: - Cypress CY8C95x0 chip pin control support, along with an immediate cleanup - Mediatek MT8188 SoC pin control support - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin control support - Qualcomm PM7250, PM8450 - Rockchip RV1126 SoC pin control support Improvements: - Fix some missing pins in the Armada 37xx driver - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro - Fix some GPIO irq_chips to be immutable - Massive Qualcomm device tree binding cleanup, with more to come" * tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits) MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" pinctrl: Create subdirectory for StarFive drivers dt-bindings: pinctrl: st,stm32: Document interrupt-controller property dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property dt-bindings: pinctrl: st,stm32: Document gpio-line-names pinctrl: st: stop abusing of_get_named_gpio() pinctrl: wpcm450: Correct the fwnode_irq_get() return value check pinctrl: bcm: Remove unused struct bcm6328_pingroup pinctrl: qcom: restrict drivers per ARM/ARM64 pinctrl: bcm: ns: Remove redundant dev_err call gpio: rockchip: request GPIO mux to pinctrl when setting direction pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops pinctrl: cy8c95x0: Drop atomicity on operations on push_pull pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper pinctrl: stm32: Switch to use dev_err_probe() helper dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings pinctrl: qcom: spmi-gpio: Add compatible for PM7250B ...
2022-09-03pinctrl: at91: move gpio suspend/resume calls to driver's contextClaudiu Beznea
Move gpio suspend/resume execution local to driver and let it execute as close as possible to the moment the machine specific PM code is executed (by setting it to .noirq member of dev_pm_ops). With this the at91_pinctrl_gpio_suspend()/at91_pinctrl_gpio_resume() calls were removed from arch/arm/mach-at91/pm.c and also a header has been removed. The patch has been checked on sama5d3_xplained, sam9x60ek, sama5d2_xplained, sama7g5ek boards. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220831135636.3176406-3-claudiu.beznea@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-08-31ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refreshClaudiu Beznea
On SAMA7G5, when resuming from backup and self-refresh, the bootloader performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored in RAM by Linux before going to backup and self-refresh). It has been discovered that the current procedure doesn't work for all possible values that might go to ZQ0SR0 due to hardware bug. The workaround to this is to avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0 register and cache its value in RAM after processing it (using modified_gray_code array). The bootloader will restore the processed value. Fixes: d2d4716d8384 ("ARM: at91: pm: save ddr phy calibration data to securam") Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com
2022-06-28ARM: at91: pm: Mark at91_pm_secure_init as __initFabio Estevam
at91_pm_secure_init() is used inside sama5d2_pm_init(), which has the __init notation. Pass the __init notation to at91_pm_secure_init() as well to fix the following section mismatch warning: WARNING: modpost: vmlinux.o(.text.unlikely+0x2138): Section mismatch in reference from the function at91_pm_secure_init() to the (unknown reference) .init.rodata:(unknown) Fixes: f2f5cf78a333 ("ARM: at91: pm: add support for sama5d2 secure suspend") Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220622114810.1186330-1-festevam@gmail.com
2022-06-28ARM: at91: pm: use proper compatibles for sama7g5's rtc and rttClaudiu Beznea
Use proper compatible strings for SAMA7G5's RTC and RTT IPs. These are necessary for configuring wakeup sources for ULP1 PM mode. Fixes: 6501330f9f5e ("ARM: at91: pm: add pm support for SAMA7G5") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220523092421.317345-4-claudiu.beznea@microchip.com
2022-06-28ARM: at91: pm: use proper compatibles for sam9x60's rtc and rttClaudiu Beznea
Use proper compatible strings for SAM9X60's RTC and RTT IPs. These are necessary for configuring wakeup sources for ULP1 PM mode. Fixes: eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220523092421.317345-3-claudiu.beznea@microchip.com
2022-06-28ARM: at91: pm: use proper compatible for sama5d2's rtcClaudiu Beznea
Use proper compatible strings for SAMA5D2's RTC IPs. This is necessary for configuring wakeup sources for ULP1 PM mode. Fixes: d7484f5c6b3b ("ARM: at91: pm: configure wakeup sources for ULP1 mode") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220523092421.317345-2-claudiu.beznea@microchip.com
2022-05-12ARM: at91: pm: add support for sama5d2 secure suspendClément Léger
When running with OP-TEE, the suspend control is handled securely. Suspend can be entered using PSCI support. Since the sama5d2 supports multiple suspend modes, add a new CONFIG_ATMEL_SECURE_PM which will send a SMC call to select the suspend mode at init time. "atmel.pm_modes" boot argument is still supported for compatibility purposes but the standby value is actually ignored since PSCI suspend is used and it only support one mode (suspend). Signed-off-by: Clément Léger <clement.leger@bootlin.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-12ARM: at91: pm: add quirks for pmClaudiu Beznea
SoCs supporting ULP0 or ULP1 modes and variants of Cadence Ethernet IP (controlled by macb driver) may behave buggy when Wake-on-Lan (WoL) is configured and WoL packet is received while in ULP0/ULP1. On some SoCs Ethernet interface is not working after resume. On other SoCs the CPU goes to abort on resume path when switching execution from internal SRAM to DRAM. For ULP1 + WoL the issue is related a particular restart sequence of the internal clocks when resuming. These clocks are automatically managed by PMC and may happen that GMAC peripheral clock is restarted few clock cycles before internal clocks causing blocking of Ethernet's DMA. As a consequence Ethernet TX transactions are stopped and RX transactions are partially stopped (packets are received by MAC, RX counters incremented but the data is not transferred to DRAM). The workaround for this is to disable Ethernet's peripheral clock when going to ULP1. Same behavior has been reproduced on ULP0 for some platforms (SAMA5D2, SAMA5D3) and the same workaround solves the issue. The problem has been solved on pm.c as quirk to avoid polluting the MACB driver with AT91 specific issues as this driver is generic to multiple vendors. At probe pointers to struct device_node are retrieved and on the at91_pm_enter() the quirk specifics are applied: for all Ethernet interfaces that were parsed the peripheral clocks are disabled. A special handling is done for modes in dns_modes mask as these are considered modes that blocks the system if WoL packet are received but for which applying quirk will lead to not waking up on WoL packets: in situation where Ethernet interface(s) has suspend mode in dns_modes mask and Ethernet interface(s) is the only available wakeup source the suspend is canceled. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-12ARM: at91: pm: use kernel documentation styleClaudiu Beznea
Use kernel documentation style. Along with it fix the naming of struct at91_pm_sfrbu_regs in documentation. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-12ARM: at91: pm: introduce macros for pm mode replacementClaudiu Beznea
Introduce macros to replace standby/suspend mode if they depends on controllers that failed to map (or other errors). Macros keep track of the complementary mode to avoid having set the same AT91 PM mode for both suspend and standby. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-05-12ARM: at91: pm: keep documentation inline with structure membersClaudiu Beznea
Move documentation of bu to keep the same order as in the structure itself. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2022-02-25ARM: at91: PM: add cpu idle support for sama7g5Claudiu Beznea
Add CPU idle support for SAMA7G5. Support will make use of PMC_CPU_RATIO register to divide the CPU clock by 16 before switching it to idle and use automatic self-refresh option of DDR controller. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220113144900.906370-5-claudiu.beznea@microchip.com
2021-12-08ARM: at91: pm: Add of_node_put() before gotoWan Jiabing
Fix following coccicheck warning: ./arch/arm/mach-at91/pm.c:643:1-33: WARNING: Function for_each_matching_node_and_match should have of_node_put() before goto Early exits from for_each_matching_node_and_match should decrement the node reference counter. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211014084555.21422-1-wanjiabing@vivo.com
2021-09-14ARM: at91: pm: switch backup area to vbat in backup modeClaudiu Beznea
Backup area is now switched to VDDIN33 at boot (with the help of bootloader). When switching to backup mode we need to switch backup area to VBAT as all the other power sources are cut off. The resuming from backup mode is done with the help of bootloader, so there is no need to do something particular in Linux to restore backup area power source. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210830100927.22711-1-claudiu.beznea@microchip.com
2021-09-14ARM: at91: pm: do not panic if ram controllers are not enabledClaudiu Beznea
In case PM is enabled but there is no RAM controller information in DT the code will panic. Avoid such scenarios by not initializing platform specific PM code in case RAM controller is not provided via DT. Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: 827de1f123ba0 ("ARM: at91: remove at91_dt_initialize and machine init_early()") Fixes: 892e1f4a3ae58 ("ARM: at91: pm: add sama7g5 ddr phy controller") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210823131915.23857-2-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add sama7g5 shdwcClaudiu Beznea
Add SAMA7G5 SHDWC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-25-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add pm support for SAMA7G5Claudiu Beznea
Add support for SAMA7G5 power management modes: standby, ulp0, ulp1, backup. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-24-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add sama7g5's pmcClaudiu Beznea
Add SAMA7G5's PMC to compatible list. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-22-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add backup mode support for SAMA7G5Claudiu Beznea
Adapt at91_pm_backup_init() to work for SAMA7G5. Also, set the LPM pin to shutdown controller. This will signal to PMIC that it needs to switch to the state corresponding to backup mode. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-21-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: save ddr phy calibration data to securamClaudiu Beznea
The resuming from backup mode is done with the help of bootloader. The bootloader reconfigure the DDR controller and DDR PHY controller. To speed-up the resuming process save the PHY calibration data into SECURAM before suspending (securam is powered on backup mode). This data will be later used by bootloader in DDR PHY reconfiguration process. Also, in the process or recalibration the first 8 words of the memory may get corrupted. To solve this, these 8 words are saved in the securam and restored by bootloader in the process of PHY configuration. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-20-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add sama7g5 ddr phy controllerClaudiu Beznea
SAMA7G5 self-refresh procedure accesses also the DDR PHY registers. Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs, in case it is mandatory. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-19-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: add sama7g5 ddr controllerClaudiu Beznea
Add SAMA7G5 DDR controller to the list of DDR controller compatibles. At the moment there is no standby support. Adapt the code for this. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-18-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: do not initialize pdevClaudiu Beznea
There is no need to initialize pdev. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-6-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: check for different controllers in at91_pm_modes_init()Claudiu Beznea
at91_pm_modes_init() checks for proper nodes in device tree and maps them accordingly. Up to SAMA7G5 all AT91 SoCs had the same mapping b/w power saving modes and different controllers needed in the final/first steps of suspend/resume. SAMA7G5 is not aligned with the old SoCs thus the code is adapted for this. This patch prepares the field for next commits. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-5-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: document at91_soc_pm structureClaudiu Beznea
Document at91_soc_pm structure. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-4-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: move the setup of soc_pm.bu->suspendedClaudiu Beznea
Move the setup of soc_pm.bu->suspended in platform_suspend::begin function so that the PMC code in charge with clocks suspend/resume to differentiate b/w standard PM mode and backup mode. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-3-claudiu.beznea@microchip.com
2021-07-19ARM: at91: pm: move pm_bu to soc_pm data structureClaudiu Beznea
Move pm_bu to soc_pm data structure. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210415105010.569620-2-claudiu.beznea@microchip.com
2021-03-26ARM: at91: pm: Move prototypes to mutually included headerLee Jones
Both the caller and the supplier's source file should have access to the include file containing the prototypes. Fixes the following W=1 kernel build warning(s): drivers/pinctrl/pinctrl-at91.c:1637:6: warning: no previous prototype for ‘at91_pinctrl_gpio_suspend’ [-Wmissing-prototypes] 1637 | void at91_pinctrl_gpio_suspend(void) | ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/pinctrl-at91.c:1661:6: warning: no previous prototype for ‘at91_pinctrl_gpio_resume’ [-Wmissing-prototypes] 1661 | void at91_pinctrl_gpio_resume(void) | ^~~~~~~~~~~~~~~~~~~~~~~~ Cc: Russell King <linux@armlinux.org.uk> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20210303124149.3149511-1-lee.jones@linaro.org
2020-08-17ARM: at91: pm: remove unnecessary at91sam9x60_idleAlexandre Belloni
cpu_do_idle() is already the default action for arm_pm_idle, there is no need to open code it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20200804115622.63232-1-alexandre.belloni@bootlin.com
2020-08-17ARM: at91: pm: of_node_put() after its usageClaudiu Beznea
Put node after it has been used. Fixes: 13f16017d3e3f ("ARM: at91: pm: Tie the USB clock mask to the pmc") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-4-git-send-email-claudiu.beznea@microchip.com
2020-08-17ARM: at91: pm: add per soc validation of pm modesClaudiu Beznea
Not all SoCs supports all the PM mode. User may end up settings, e.g. backup mode, on a non SAMA5D2 device, but the mode to not be valid. If backup mode is used on a devices not supporting it there will be no way of resuming other than rebooting. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-3-git-send-email-claudiu.beznea@microchip.com
2020-08-17ARM: at91: pm: add support for ULP0 fast wakeupClaudiu Beznea
ULP0 fast improves suspend/resume time with few milliseconds the drawback being the power consumption. The mean values measured for suspend/resume time are as follows (measured on SAMA5D2 Xplained board), ULP0 compared with fast ULP0: - ulp0 fast: suspend time: 169 ms, resume time: 216 ms - ulp0 : suspend time: 197 ms, resume time: 258 ms Current consumption while suspended (measured on SAMA5D2 Xplained board): - ulp0 fast: 730uA - ulp0 : 270uA Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1596616610-15460-2-git-send-email-claudiu.beznea@microchip.com
2020-07-18ARM: at91: pm: add missing put_device() call in at91_pm_sram_init()yu kuai
if of_find_device_by_node() succeed, at91_pm_sram_init() doesn't have a corresponding put_device(). Thus add a jump target to fix the exception handling for this function implementation. Fixes: d2e467905596 ("ARM: at91: pm: use the mmio-sram pool to access SRAM") Signed-off-by: yu kuai <yukuai3@huawei.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200604123301.3905837-1-yukuai3@huawei.com
2020-02-18ARM: at91: pm: add pmc_version member to at91_pm_dataClaudiu Beznea
This will be used to differentiate b/w different PLLs settings to be applied in the final/first steps of the suspend/resume process by doing PLL specific configurations. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com
2020-02-18ARM: at91: pm: use proper master clock register offsetClaudiu Beznea
SAM9X60's PMC has different master clock register offset than the other SoCs' PMC. Due to this, specify master clock register offset based on PMC compatible and pass it to pm_suspend.S since it is also needed in there. When PM part for SAM9X60 was published the SAM9X60's PMC (commit f6deae46039c ("clk: at91: add sam9x60 pmc driver")) wasn't integrated. Fixes: 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1579522208-19523-2-git-send-email-claudiu.beznea@microchip.com
2020-01-10ARM: at91: pm: use of_device_id array to find the proper shdwc nodeClaudiu Beznea
Use of_device_id array to find the proper shdwc compatibile node. SAM9X60's shdwc changes were not integrated when commit eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") was integrated. Fixes: eaedc0d379da ("ARM: at91: pm: add ULP1 support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1576062248-18514-3-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-10ARM: at91: pm: use SAM9X60 PMC's compatibleClaudiu Beznea
SAM9X60 PMC's has a different PMC. It was not integrated at the moment commit 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") was published. Fixes: 01c7031cfa73 ("ARM: at91: pm: initial PM support for SAM9X60") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1576062248-18514-2-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10ARM: at91: pm: move SAM9X60's PM under its own SoC config flagClaudiu Beznea
Move SAM9X60's PM part under SoC config flag. This allows the building of SAM9X60 platform withouth depending on CONFIG_SOC_AT91SAM9 flag, allowing us to select only necessary config flags for SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1575035505-6310-4-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-06-25Merge tag 'at91-5.3-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC for 5.3 - fix a pm.c warning with W=1 * tag 'at91-5.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: arm: add missing include platform-data/atmel.h Signed-off-by: Olof Johansson <olof@lixom.net>
2019-06-20arm: add missing include platform-data/atmel.hPhilippe Mazenauer
Include corresponding headerfile <linux/platform-data/atmel.h> for function at91_suspend_entering_slow_clock(). ../arch/arm/mach-at91/pm.c:279:5: warning: no previous prototype for ‘at91_suspend_entering_slow_clock’ [-Wmissing-prototypes] int at91_suspend_entering_slow_clock(void) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mazenauer <philippe.mazenauer@outlook.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-16Merge tag 'at91-5.2-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late AT91 SoC for 5.2 - PM changes for SAM9X60 * tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: do not disable/enable PLLA for ULP modes ARM: at91: pm: disable RC oscillator in ULP0 ARM: at91: pm: add ULP1 support for SAM9X60 ARM: at91: pm: add support for per SoC wakeup source configuration ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs ARM: at91: pm: initial PM support for SAM9X60 dt-bindings: arm: atmel: add binding for SAM9X60 SoC ARM: at91: pm: introduce at91_soc_pm structure Signed-off-by: Olof Johansson <olof@lixom.net>
2019-04-04arm/mach-at91/pm : fix possible object reference leakPeng Hao
of_find_device_by_node() takes a reference to the struct device when it finds a match via get_device. When returning error we should call put_device. Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: add ULP1 support for SAM9X60Claudiu Beznea
Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in PMC if it is not enabled. At resume the state before suspend is restored. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: add support for per SoC wakeup source configurationClaudiu Beznea
Add support for per SoC wakeup source configuration. In this way we could have per SoC wakeup sources, shutdown controller and power management controller configurations for ULP1 power management mode. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCsClaudiu Beznea
In at91_pm_backup_init() return if it is not about SAMA5D2 SoCs. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: initial PM support for SAM9X60Claudiu Beznea
Add initial PM support for SAM9X60. This include idle, WFI and ULP0. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
2019-03-28ARM: at91: pm: introduce at91_soc_pm structureClaudiu Beznea
To have per SoC PM information add a new structure which embed a member of type struct at91_pm_data. This will allow easy addition of new information without contaminate struct at91_pm_data that is passed to the last phase suspend function (at91_suspend_sram_fn). Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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