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path: root/arch/x86/include/asm/perf_event.h
AgeCommit message (Expand)Author
2022-05-11perf/amd/ibs: Add support for L3 miss filteringRavi Bangoria
2022-05-11Merge branch 'v5.18-rc5'Peter Zijlstra
2022-05-04perf/x86/amd/core: Detect available countersSandipan Das
2022-04-05perf/x86/amd: Add idle hooks for branch samplingStephane Eranian
2022-04-05perf/x86/intel: Don't extend the pseudo-encoding to GP countersKan Liang
2022-02-02perf/x86/intel: Increase max number of the fixed countersKan Liang
2021-06-17perf/x86: Reset the dirty counter to prevent the leak for an RDPMC taskKan Liang
2021-02-01perf/x86/intel: Add perf core PMU support for Sapphire RapidsKan Liang
2021-02-01perf/x86/intel: Filter unsupported Topdown metrics eventKan Liang
2021-01-27x86/perf: Use static_call for x86_pmu.guest_get_msrsLike Xu
2020-11-09perf/x86/intel: Make anythread filter support conditionalStephane Eranian
2020-09-10perf/x86/amd/ibs: Support 27-bit extended Op/cycle counterKim Phillips
2020-08-18perf/x86/intel: Support TopDown metrics on Ice LakeKan Liang
2020-08-18perf/x86: Add a macro for RDPMC offset of fixed countersKan Liang
2020-08-18perf/x86/intel: Generic support for hardware TopDown metricsKan Liang
2020-08-18perf/x86/intel: Move BTS index to 47Kan Liang
2020-08-18perf/x86/intel: Introduce the fourth fixed counterKan Liang
2020-08-18perf/x86/intel: Name the global status bit in NMI handlerKan Liang
2020-07-08perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang
2020-07-08perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang
2020-07-08perf/x86: Expose CPUID enumeration bits for arch LBRKan Liang
2020-07-02perf/x86: Add constraint to create guest LBR event without hw counterLike Xu
2020-07-02perf/x86/lbr: Add interface to get LBR informationLike Xu
2020-03-17perf/amd/uncore: Add support for Family 19h L3 PMUKim Phillips
2020-01-13perf/x86: Provide stubs of KVM helpers for non-Intel CPUsSean Christopherson
2019-08-30perf/x86/amd/ibs: Fix sample bias for dispatched micro-opsKim Phillips
2019-04-29perf/x86: Make perf callchains work without CONFIG_FRAME_POINTERKairui Song
2019-04-16perf/x86/intel: Add Icelake supportKan Liang
2019-04-16perf/x86/intel: Support adaptive PEBS v4Kan Liang
2019-04-16perf/x86: Support outputting XMM registersKan Liang
2018-10-02Merge branch 'x86/cache' into perf/core, to resolve conflictsIngo Molnar
2018-10-02perf/x86/amd/uncore: Set ThreadMask and SliceMask for L3 Cache perf eventsNatarajan, Janakarajan
2018-09-28perf/x86: Add helper to obtain performance counter indexReinette Chatre
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2016-04-28perf/x86/intel/pt: Don't die on VMXONAlexander Shishkin
2016-03-08perf/x86/intel: Add definition for PT PMI bitStephane Eranian
2015-08-04x86: Add new MSRs and MSR bits used for Intel Skylake PMU supportAndi Kleen
2014-11-12perf/x86/amd/ibs: Update IBS MSRs and feature definitionsAravind Gopalakrishnan
2014-08-13perf/x86: Revamp PEBS event selectionAndi Kleen
2013-06-19perf/x86/intel: Add simple Haswell PMU supportAndi Kleen
2013-02-16perf/x86/amd: Enable northbridge performance counters on AMD family 15hJacob Shin
2013-02-06perf/x86/amd: Use proper naming scheme for AMD bit field definitionsJacob Shin
2012-08-10perf: Factor __output_copy to be usable with specific copy functionFrederic Weisbecker
2012-07-31perf/x86: Fix USER/KERNEL tagging of samples properlyPeter Zijlstra
2012-07-26perf/x86: Fix missing struct before structure nameJovi Zhang
2012-07-05perf/x86: Add a microcode revision check for SNB-PEBSPeter Zijlstra
2012-07-05perf/x86/amd: Unify AMD's generic and family 15h pmusRobert Richter
2012-07-05perf/x86: Rename Intel specific macrosRobert Richter
2012-05-14perf/x86/ibs: Fix undefined reference to `get_ibs_caps'Robert Richter
2012-05-09perf/x86-ibs: Take instruction pointer from ibs sampleRobert Richter
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