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path: root/arch/x86/kernel
AgeCommit message (Expand)Author
2018-10-06x86/jump-labels: Macrofy inline assembly code to work around GCC inlining bugsNadav Amit
2018-10-06x86/cpufeature: Macrofy inline assembly code to work around GCC inlining bugsNadav Amit
2018-10-06x86/extable: Macrofy inline assembly code to work around GCC inlining bugsNadav Amit
2018-10-06Merge branch 'core/core' into x86/build, to prevent conflictsIngo Molnar
2018-10-06kdump, proc/vmcore: Enable kdumping encrypted memory with SME enabledLianbo Jiang
2018-10-05Merge branch 'x86/core' into x86/build, to avoid conflictsIngo Molnar
2018-10-04x86/vdso: Enforce 64bit clocksourceThomas Gleixner
2018-10-04x86/time: Implement clocksource_arch_init()Thomas Gleixner
2018-10-04x86/paravirt: Work around GCC inlining bugs when compiling paravirt opsNadav Amit
2018-10-04x86/bug: Macrofy the BUG table section handling, to work around GCC inlining ...Nadav Amit
2018-10-04x86/alternatives: Macrofy lock prefixes to work around GCC inlining bugsNadav Amit
2018-10-04x86/refcount: Work around GCC inlining bugNadav Amit
2018-10-04x86/objtool: Use asm macros to work around GCC inlining bugsNadav Amit
2018-10-04kbuild/Makefile: Prepare for using macros in inline assembly code to work aro...Nadav Amit
2018-10-04Merge branch 'linus' into x86/core, to pick up fixesIngo Molnar
2018-10-03x86/intel_rdt: Show missing resctrl mount optionsXiaochen Shen
2018-10-03x86/intel_rdt: Switch to bitmap_zalloc()Andy Shevchenko
2018-10-03x86/intel_rdt: Re-enable pseudo-lock measurementsReinette Chatre
2018-10-03x86, hibernate: Fix nosave_regions setup for hibernationZhimin Gu
2018-10-03x86/cpu/amd: Remove unnecessary parenthesesNathan Chancellor
2018-10-02x86/tsc: Fix UV TSC initializationMike Travis
2018-10-02x86/earlyprintk: Add a force option for pciserial deviceFeng Tang
2018-10-02x86/cpu: Sanitize FAM6_ATOM namingPeter Zijlstra
2018-09-28x86/intel_rdt: Use perf infrastructure for measurementsReinette Chatre
2018-09-28x86/intel_rdt: Create required perf event attributesReinette Chatre
2018-09-28x86/intel_rdt: Remove local register variablesReinette Chatre
2018-09-28x86: DT: use for_each_of_cpu_node iteratorRob Herring
2018-09-27x86/mce: Add Hygon Dhyana support to the MCA infrastructurePu Wen
2018-09-27x86/bugs: Add Hygon Dhyana to the respective mitigation machineryPu Wen
2018-09-27x86/apic: Add Hygon Dhyana supportPu Wen
2018-09-27x86/pci, x86/amd_nb: Add Hygon Dhyana support to PCI and northbridgePu Wen
2018-09-27x86/amd_nb: Check vendor in AMD-only functionsPu Wen
2018-09-27x86/alternative: Init ideal_nops for Hygon DhyanaPu Wen
2018-09-27x86/events: Add Hygon Dhyana support to PMU infrastructurePu Wen
2018-09-27x86/smpboot: Do not use BSP INIT delay and MWAIT to idle on DhyanaPu Wen
2018-09-27x86/cpu/mtrr: Support TOP_MEM2 and get MTRR numberPu Wen
2018-09-27x86/cpu: Get cache info and setup cache cpumap for Hygon DhyanaPu Wen
2018-09-27Merge branch 'tip-x86-hygon' into tip-x86-cpuBorislav Petkov
2018-09-27x86/jump_label: Switch to jump_entry accessorsArd Biesheuvel
2018-09-27x86: Add support for 64-bit place relative relocationsArd Biesheuvel
2018-09-27x86/cpu: Create Hygon Dhyana architecture support filePu Wen
2018-09-26x86/speculation: Propagate information about RSB filling mitigation to sysfsJiri Kosina
2018-09-26x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigationJiri Kosina
2018-09-22x86/CPU: Change query logic so CPUID is enabled before testingMatthew Whitehead
2018-09-22x86/CPU: Use correct macros for Cyrix callsMatthew Whitehead
2018-09-21signal/x86: Use force_sig_fault where appropriateEric W. Biederman
2018-09-21signal/x86/traps: Simplify trap generationEric W. Biederman
2018-09-21signal/x86/traps: Use force_sig instead of open coding it.Eric W. Biederman
2018-09-21signal/x86/traps: Use force_sig_bnderrEric W. Biederman
2018-09-21signal/x86/traps: Move more code into do_trap_no_signal so it can be reusedEric W. Biederman
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