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path: root/drivers/clk/at91
AgeCommit message (Expand)Author
2021-10-26clk: at91: sama7g5: add securam's peripheral clockClaudiu Beznea
2021-10-26clk: at91: pmc: execute suspend/resume only for backup modeClaudiu Beznea
2021-10-26clk: at91: re-factor clocks suspend/resumeClaudiu Beznea
2021-10-07clk: at91: check pmc node status before registering syscore opsClément Léger
2021-09-01Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-rali...Stephen Boyd
2021-08-28clk: at91: clk-generated: Limit the requested rate to our rangeCodrin Ciubotariu
2021-08-28clk: at91: sama7g5: remove all kernel-doc & kernel-doc warningsRandy Dunlap
2021-03-13clk: at91: Trivial typo fixes in the file sama7g5.cBhaskar Chowdhury
2021-02-09clk: at91: Fix the declaration of the clocksTudor Ambarus
2020-12-19clk: at91: sam9x60: remove atmel,osc-bypass supportAlexandre Belloni
2020-12-19clk: at91: sama7g5: register cpu clockClaudiu Beznea
2020-12-19clk: at91: clk-master: re-factor master clockClaudiu Beznea
2020-12-19clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHzClaudiu Beznea
2020-12-19clk: at91: sama7g5: decrease lower limit for MCK0 rateClaudiu Beznea
2020-12-19clk: at91: sama7g5: remove mck0 from parent list of other clocksClaudiu Beznea
2020-12-19clk: at91: clk-sam9x60-pll: allow runtime changes for pllClaudiu Beznea
2020-12-19clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristicsEugen Hristev
2020-12-19clk: at91: clk-master: add 5th divisor for mck masterEugen Hristev
2020-12-19clk: at91: sama7g5: allow SYS and CPU PLLs to be exported and referenced in DTEugen Hristev
2020-12-19dt-bindings: clock: at91: add sama7g5 pll definesEugen Hristev
2020-12-19clk: at91: sama7g5: fix compilation errorClaudiu Beznea
2020-10-20Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom...Stephen Boyd
2020-10-14clk: at91: sam9x60: support only two programmable clocksClaudiu Beznea
2020-10-13clk: at91: clk-sam9x60-pll: remove unused variableClaudiu Beznea
2020-10-13clk: at91: clk-main: update key before writing AT91_CKGR_MORClaudiu Beznea
2020-10-13clk: at91: remove the checking of parent_nameClaudiu Beznea
2020-09-22clk: at91: drop unused at91sam9g45_pcr_layoutKrzysztof Kozlowski
2020-07-24clk: at91: sama7g5: add clock support for sama7g5Claudiu Beznea
2020-07-24clk: at91: clk-utmi: add utmi support for sama7g5Claudiu Beznea
2020-07-24clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputsClaudiu Beznea
2020-07-24clk: at91: clk-programmable: add mux_table optionClaudiu Beznea
2020-07-24clk: at91: clk-peripheral: add support for changeable parent rateClaudiu Beznea
2020-07-24clk: at91: clk-master: add master clock support for SAMA7G5Claudiu Beznea
2020-07-24clk: at91: clk-generated: add mux_table optionClaudiu Beznea
2020-07-24clk: at91: clk-generated: pass the id of changeable parent at registrationClaudiu Beznea
2020-07-24clk: at91: replace conditional operator with double logical notClaudiu Beznea
2020-07-24clk: at91: sckc: register slow_rc with accuracy optionClaudiu Beznea
2020-07-24clk: at91: sam9x60: fix main rc oscillator frequencyClaudiu Beznea
2020-07-24clk: at91: sam9x60-pll: use frac when setting frequencyClaudiu Beznea
2020-07-24clk: at91: sam9x60-pll: check fcore against rangesClaudiu Beznea
2020-07-24clk: at91: sam9x60-pll: use logical or for range checkClaudiu Beznea
2020-07-24clk: at91: clk-sam9x60-pll: fix mul maskClaudiu Beznea
2020-07-24clk: at91: clk-generated: check best_rate against rangesClaudiu Beznea
2020-07-24clk: at91: clk-generated: continue if __clk_determine_rate() returns errorClaudiu Beznea
2020-07-24clk: at91: fix possible dead lock in new driversAhmad Fatoum
2020-05-26clk: at91: allow setting all PMC clock parents via DTMichał Mirosław
2020-05-26clk: at91: allow setting PCKx parent via DTMichał Mirosław
2020-05-26clk: at91: optimize pmc data allocationMichał Mirosław
2020-05-26clk: at91: pmc: decrement node's refcountClaudiu Beznea
2020-05-26clk: at91: pmc: do not continue if compatible not locatedClaudiu Beznea