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path: root/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
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2017-12-07clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocksChen-Yu Tsai
On the A64, the MMC module clocks are fixed in the new timing mode, i.e. they do not have a bit to select the mode. These clocks have a 2x divider somewhere between the clock and the MMC module. To be consistent with other SoCs supporting the new timing mode, we model the 2x divider as a fixed post-divider on the MMC module clocks. This patch adds the post-dividers to the MMC clocks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai
On the A83T, the AHB1 clock has a shared pre-divider on the two PLL-PERIPH clock parents. To support such instances of shared pre-dividers, this patch extends the mux clock type to support multiple variable pre-dividers. As the pre-dividers are only used to calculate the rate, but do not participate in the factorization process, this is fairly straightforward. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-03-20clk: sunxi-ng: Fix div/mult settings for osc12M on A64Philipp Tomsich
The mult/div for osc12M was previously backwards (giving a 48M rate for osc12M). Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Christoph Muellner <christoph.muellner@theobroma-systems.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-11-16clk: sunxi-ng: Mark structs static and cleanup spacesStephen Boyd
Some checkpatch warnings about spaces were missed and we didn't mark two structs as static. Clean it up. Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-03clk: sunxi-ng: Add A64 clocksMaxime Ripard
Add the A64 CCU clocks set. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>