Age | Commit message (Expand) | Author |
2022-04-08 | cxl/pci: Drop shadowed variable | Dan Williams |
2022-03-22 | cxl/core/port: Fix NULL but dereferenced coccicheck error | Wan Jiabing |
2022-02-17 | cxl/port: Hold port reference until decoder release | Dan Williams |
2022-02-17 | cxl/port: Fix endpoint refcount leak | Dan Williams |
2022-02-11 | cxl/core: Fix cxl_device_lock() class detection | Dan Williams |
2022-02-11 | cxl/core/port: Fix unregister_port() lock assertion | Dan Williams |
2022-02-08 | cxl/regs: Fix size of CXL Capability Header Register | Jonathan Cameron |
2022-02-08 | cxl/core/port: Handle invalid decoders | Dan Williams |
2022-02-08 | cxl/core/port: Fix / relax decoder target enumeration | Dan Williams |
2022-02-08 | cxl/core/port: Add endpoint decoders | Ben Widawsky |
2022-02-08 | cxl/core: Move target_list out of base decoder attributes | Dan Williams |
2022-02-08 | cxl/mem: Add the cxl_mem driver | Ben Widawsky |
2022-02-08 | cxl/core/port: Add switch port enumeration | Dan Williams |
2022-02-08 | cxl/memdev: Add numa_node attribute | Dan Williams |
2022-02-08 | cxl/pci: Emit device serial number | Dan Williams |
2022-02-08 | cxl/pci: Implement wait for media active | Ben Widawsky |
2022-02-08 | cxl/pci: Retrieve CXL DVSEC memory info | Ben Widawsky |
2022-02-08 | cxl/pci: Cache device DVSEC offset | Ben Widawsky |
2022-02-08 | cxl/pci: Store component register base in cxlds | Ben Widawsky |
2022-02-08 | cxl/core/port: Remove @host argument for dport + decoder enumeration | Dan Williams |
2022-02-08 | cxl/port: Add a driver for 'struct cxl_port' objects | Ben Widawsky |
2022-02-08 | cxl/core: Emit modalias for CXL devices | Dan Williams |
2022-02-08 | cxl/core/hdm: Add CXL standard decoder enumeration to the core | Dan Williams |
2022-02-08 | cxl/core: Generalize dport enumeration in the core | Dan Williams |
2022-02-08 | cxl/pci: Rename pci.h to cxlpci.h | Dan Williams |
2022-02-08 | cxl/port: Up-level cxl_add_dport() locking requirements to the caller | Dan Williams |
2022-02-08 | cxl/pmem: Introduce a find_cxl_root() helper | Dan Williams |
2022-02-08 | cxl/port: Introduce cxl_port_to_pci_bus() | Dan Williams |
2022-02-08 | cxl/core/port: Use dedicated lock for decoder target list | Dan Williams |
2022-02-08 | cxl: Prove CXL locking | Dan Williams |
2022-02-08 | cxl/core: Track port depth | Ben Widawsky |
2022-02-08 | cxl/core/port: Make passthrough decoder init implicit | Ben Widawsky |
2022-02-08 | cxl/core: Fix cxl_probe_component_regs() error message | Dan Williams |
2022-02-08 | cxl/core/port: Clarify decoder creation | Ben Widawsky |
2022-02-08 | cxl/core: Convert decoder range to resource | Ben Widawsky |
2022-02-08 | cxl/decoder: Hide physical address information from non-root | Dan Williams |
2022-02-08 | cxl/core/port: Rename bus.c to port.c | Dan Williams |
2022-02-08 | cxl: Introduce module_cxl_driver | Ben Widawsky |
2022-02-08 | cxl/acpi: Map component registers for Root Ports | Ben Widawsky |
2022-02-08 | cxl/pci: Add new DVSEC definitions | Ben Widawsky |
2022-02-08 | cxl: Flesh out register names | Ben Widawsky |
2022-02-08 | cxl/pci: Defer mailbox status checks to command timeouts | Dan Williams |
2022-02-08 | cxl/pci: Implement Interface Ready Timeout | Ben Widawsky |
2022-02-08 | cxl: Rename CXL_MEM to CXL_PCI | Ben Widawsky |
2022-01-04 | cxl/core: Remove cxld_const_init in cxl_decoder_alloc() | Nathan Chancellor |
2021-11-15 | cxl/pmem: Fix module reload vs workqueue state | Dan Williams |
2021-11-15 | ACPI: NUMA: Add a node and memblk for each CFMWS not in SRAT | Alison Schofield |
2021-11-15 | cxl/test: Mock acpi_table_parse_cedt() | Dan Williams |
2021-11-15 | cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpers | Dan Williams |
2021-11-15 | cxl/memdev: Remove unused cxlmd field | Ira Weiny |