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2020-11-09dmaengine: tegra210-adma: remove redundant irqsave and irqrestore in hardIRQBarry Song
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Link: https://lore.kernel.org/r/20201027215252.25820-5-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: sf-pdma: remove redundant irqsave and irqrestore in hardIRQBarry Song
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Cc: Green Wan <green.wan@sifive.com> Link: https://lore.kernel.org/r/20201027215252.25820-4-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: ti: k3-udma: remove redundant irqsave and irqrestore in hardIRQBarry Song
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201027215252.25820-3-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: ipu_idmac: remove redundant irqsave and restore in hardIRQBarry Song
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Link: https://lore.kernel.org/r/20201027215252.25820-2-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: ti: k3-udma-glue: move psi-l pairing in channel en/dis functionsGrygorii Strashko
The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L threads are paired UDMA<->IP and no further transfers is possible. This could be the case for IPs J721E Main CPSW (cpsw9g). Hence, to avoid such situation do PSI-L threads pairing only when UDMA channel is going to be enabled as at this time DMA consumer module expected to be active already. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201030203000.4281-1-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: idma64: Switch to use __maybe_unused instead of ifdefferyAndy Shevchenko
ifdeffery is prone to errors and makes code harder to read. Switch to use __maybe_unused instead of ifdeffery. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20201104103131.89907-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: dw: Enable runtime PMAndy Shevchenko
When consumer requests channel power on the DMA controller device and otherwise on the freeing channel resources. Note, in some cases consumer acquires channel at the ->probe() stage and releases it at the ->remove() stage. It will mean that DMA controller device will be powered during all this time if there is no assist from hardware to idle it. The above mentioned cases should be investigated separately and individually. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20201103183938.64752-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: idxd: define table offset multiplierDave Jiang
Convert table offset multiplier magic number to a define. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160407311690.839435.6941865731867828234.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-09dmaengine: idxd: Update calculation of group offset to be more readableDave Jiang
Create helper macros to make group offset calculation more readable. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160407294683.839093.10740868559754142070.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: idxd: Clean up descriptors with fault errorDave Jiang
Add code to "complete" a descriptor when the descriptor or its completion address hit a fault error when SVA mode is being used. This error can be triggered due to bad programming by the user. A lock is introduced in order to protect the descriptor completion lists since the fault handler will run from the system work queue after being scheduled in the interrupt handler. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/160382008092.3911367.12766483427643278985.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: idxd: Add shared workqueue supportDave Jiang
Add shared workqueue support that includes the support of Shared Virtual memory (SVM) or in similar terms On Demand Paging (ODP). The shared workqueue uses the enqcmds command in kernel and will respond with retry if the workqueue is full. Shared workqueue only works when there is PASID support from the IOMMU. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/160382007499.3911367.26043087963708134.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: ppc4xx: remove xor_hw_desc assignment without readingKrzysztof Kozlowski
The xor_hw_desc local variable is assigned but never read: drivers/dma/ppc4xx/adma.c: In function ‘ppc440spe_desc_set_src_mult’: drivers/dma/ppc4xx/adma.c:562:17: warning: variable ‘xor_hw_desc’ set but not used [-Wunused-but-set-variable] Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201019155756.21445-2-krzk@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: ppc4xx: make ppc440spe_adma_chan_list staticKrzysztof Kozlowski
The ppc440spe_adma_chan_list file-scope variable is not used outside of the unit so it can be made static. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201019155756.21445-1-krzk@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: at_xdmac: add AXI priority support and recommended settingsEugen Hristev
The sama7g5 version of the XDMAC supports priority configuration and outstanding capabilities. Add defines for the specific registers for this configuration, together with recommended settings. However the settings are very different if the XDMAC is a mem2mem or a per2mem controller. Thus, we need to differentiate according to device tree property. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/20201016093918.290137-1-eugen.hristev@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: at_xdmac: add support for sama7g5 based at_xdmacEugen Hristev
SAMA7G5 SoC uses a slightly different variant of the AT_XDMAC. Added support by a new compatible and a layout struct that copes to the specific version considering the compatible string. Only the differences in register map are present in the layout struct. I reworked the register access for this part that has the differences. Also the Source/Destination Interface bits are no longer valid for this variant of the XDMAC. Thus, the layout also has a bool for specifying whether these bits are required or not. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/20201016093850.290053-1-eugen.hristev@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: at_xdmac: adapt perid for mem2mem operationsEugen Hristev
The PERID in the CC register for mem2mem operations must match an unused PERID. The PERID field is 7 bits, but the selected value is 0x3f. On later products we can have more reserved PERIDs for actual peripherals, thus this needs to be increased to maximum size. Changing the value to 0x7f, which is the maximum for 7 bits field. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201016093725.289880-1-eugen.hristev@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: pl330: Remove unreachable codeSurendran K
_setup_req(..) never returns negative value. Hence the condition ret < 0 is never met Signed-off-by: Surendran K <surendran.k@samsung.com> Link: https://lore.kernel.org/r/20201016103347.63084-1-surendran.k@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: stm32-mdma: Use struct_size() in kzalloc()Gustavo A. R. Silva
Make use of the new struct_size() helper instead of the offsetof() idiom. Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20201008141828.GA20325@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-30dmaengine: idxd: fix wq config registers offset programmingDave Jiang
DSA spec v1.1 [1] updated to include a stride size register for WQ configuration that will specify how much space is reserved for the WQ configuration register set. This change is expected to be in the final gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ offset calculation and fixup WQCFG_OFFSET() to use the new calculated wq size. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-28misc: mic: remove the MIC driversSudeep Dutt
This patch removes the MIC drivers from the kernel tree since the corresponding devices have been discontinued. Removing the dma and char-misc changes in one patch and merging via the char-misc tree is best to avoid any potential build breakage. Cc: Nikhil Rao <nikhil.rao@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com> Acked-By: Vinod Koul <vkoul@kernel.org> Reviewed-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/8c1443136563de34699d2c084df478181c205db4.1603854416.git.sudeep.dutt@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-28dmaengine: ti: k3-udma: fix -Wenum-conversion warningArnd Bergmann
gcc warns about a mismatch argument type when passing 'false' into a function that expects an enum: drivers/dma/ti/k3-udma-private.c: In function 'xudma_tchan_get': drivers/dma/ti/k3-udma-private.c:86:34: warning: implicit conversion from 'enum <anonymous>' to 'enum udma_tp_level' [-Wenum-conversion] 86 | return __udma_reserve_##res(ud, false, id); \ | ^~~~~ drivers/dma/ti/k3-udma-private.c:95:1: note: in expansion of macro 'XUDMA_GET_PUT_RESOURCE' 95 | XUDMA_GET_PUT_RESOURCE(tchan); | ^~~~~~~~~~~~~~~~~~~~~~ In this case, false has the same numerical value as UDMA_TP_NORMAL, so passing that is most likely the correct way to avoid the warning without changing the behavior. Fixes: d70241913413 ("dmaengine: ti: k3-udma: Add glue layer for non DMAengine users") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201026160123.3704531-1-arnd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-28dmaengine: idxd: fix wq config registers offset programmingDave Jiang
DSA spec v1.1 [1] updated to include a stride size register for WQ configuration that will specify how much space is reserved for the WQ configuration register set. This change is expected to be in the final gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ offset calculation and fixup WQCFG_OFFSET() to use the new calculated wq size. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-24Merge tag 'armsoc-drivers' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms. A bulk of this is smaller fixes or cleanups, but some of the new material this time around is: - Support for Nvidia Tegra234 SoC - Ring accelerator support for TI AM65x - PRUSS driver for TI platforms - Renesas support for R-Car V3U SoC - Reset support for Cortex-M4 processor on i.MX8MQ There are also new socinfo entries for a handful of different SoCs and platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits) drm/mediatek: reduce clear event soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api soc: mediatek: cmdq: add jump function soc: mediatek: cmdq: add write_s_mask value function soc: mediatek: cmdq: add write_s value function soc: mediatek: cmdq: add read_s function soc: mediatek: cmdq: add write_s_mask function soc: mediatek: cmdq: add write_s function soc: mediatek: cmdq: add address shift in jump soc: mediatek: mtk-infracfg: Fix kerneldoc soc: amlogic: pm-domains: use always-on flag reset: sti: reset-syscfg: fix struct description warnings reset: imx7: add the cm4 reset for i.MX8MQ dt-bindings: reset: imx8mq: add m4 reset reset: Fix and extend kerneldoc reset: reset-zynqmp: Added support for Versal platform dt-bindings: reset: Updated binding for Versal reset driver reset: imx7: Support module build soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk soc: fsl: qman: convert to use be32_add_cpu() ...
2020-10-08dmaengine: owl-dma: fix kernel-doc style for enumVinod Koul
Driver doesn't use keyword enum for enum owl_dmadesc_offsets resulting in warning: drivers/dma/owl-dma.c:139: warning: cannot understand function prototype: 'enum owl_dmadesc_offsets ' So add the keyword to fix it and also add documentation for missing OWL_DMADESC_SIZE Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201007083113.567559-6-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-08dmaengine: zynqmp_dma: fix kernel-doc style for taskletVinod Koul
Commit f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new tasklet_setup() API") updated driver to use new tasklet_setup() API but missed to update the documentation for the tasklet function. Fixes: f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new tasklet_setup() API") Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20201007083113.567559-5-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-08dmaengine: xilinx_dma: fix kernel-doc style for taskletVinod Koul
Commit f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new tasklet_setup() API") updated driver to use new tasklet_setup() API but missed to update the documentation for the tasklet function. Fixes: f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new tasklet_setup() API") Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20201007083113.567559-4-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-08dmaengine: qcom: bam_dma: fix kernel-doc style for taskletVinod Koul
Commit 00c4747a2f64 ("dmaengine: qcom: convert tasklets to use new tasklet_setup() API") updated driver to use new tasklet_setup() API but missed to update the documentation for the tasklet function. Fixes: 00c4747a2f64 ("dmaengine: qcom: convert tasklets to use new tasklet_setup() API") Link: https://lore.kernel.org/r/20201007083113.567559-3-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-08dmaengine: altera-msgdma: fix kernel-doc style for taskletVinod Koul
Commit 6752e40d669a ("dmaengine: altera-msgdma: convert tasklets to use new tasklet_setup() API") updated driver to use new tasklet_setup() API but missed to update the documentation for the tasklet function. Fixes: 6752e40d669a ("dmaengine: altera-msgdma: convert tasklets to use new tasklet_setup() API") Link: https://lore.kernel.org/r/20201007083113.567559-2-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-07dmaengine: xilinx: dpdma: convert tasklets to use new tasklet_setup() APIAllen Pais
In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Allen Pais <apais@linux.microsoft.com> Link: https://lore.kernel.org/r/20201006050458.221329-2-allen.lkml@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-07dmaengine: sf-pdma: convert tasklets to use new tasklet_setup() APIAllen Pais
In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Allen Pais <apais@linux.microsoft.com> Link: https://lore.kernel.org/r/20201006050458.221329-1-allen.lkml@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: rcar-dmac: drop double zeroingJulia Lawall
sg_init_table zeroes its first argument, so the allocation of that argument doesn't have to. the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,n,flags; @@ x = - kcalloc + kmalloc_array (n,sizeof(*x),flags) ... sg_init_table(x,n) // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/1600601186-7420-10-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: sh: drop double zeroingJulia Lawall
sg_init_table zeroes its first argument, so the allocation of that argument doesn't have to. the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,n,flags; @@ x = - kcalloc + kmalloc_array (n,sizeof(*x),flags) ... sg_init_table(x,n) // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Link: https://lore.kernel.org/r/1600601186-7420-5-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: ioat: Allocate correct size for descriptor chunkLogan Gunthorpe
dma_alloc_coherent() is called with a fixed SZ_2M size, but frees happen with IOAT_CHUNK_SIZE. Recently, IOAT_CHUNK_SIZE was reduced to 512M but the allocation did not change. To fix, change to using the IOAT_CHUNK_SIZE define. This was caught with the upcoming patchset for converting Intel platforms to the dma-iommu implementation. It has a warning when the unmapped size differs from the mapped size. Fixes: a02254f8a676 ("dmaengine: ioat: Decreasing allocation chunk size 2M->512K") Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/intel-gfx/776771a2-247a-d1be-d882-bee02d919ae0@deltatee.com/ Link: https://lore.kernel.org/r/20200922200844.2982-1-logang@deltatee.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: ti: k3-udma: use devm_platform_ioremap_resource_bynameZhang Qilong
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200921093701.102208-1-zhangqilong3@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: fsl: remove bad channel updateVinod Koul
Commit 59cd818763e8 ("dmaengine: fsl: convert tasklets to use new tasklet_setup() API") broke this driver by not removing the old channel update method. Fix this by remove the offending call as channel is queried from tasklet structure. Fixes: 59cd818763e8 ("dmaengine: fsl: convert tasklets to use new tasklet_setup() API") Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201001164740.178977-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05dmaengine: dma-jz4780: Fix race in jz4780_dma_tx_statusPaul Cercueil
The jz4780_dma_tx_status() function would check if a channel's cookie state was set to 'completed', and if not, it would enter the critical section. However, in that time frame, the jz4780_dma_chan_irq() function was able to set the cookie to 'completed', and clear the jzchan->vchan pointer, which was deferenced in the critical section of the first function. Fix this race by checking the channel's cookie state after entering the critical function and not before. Fixes: d894fc6046fe ("dmaengine: jz4780: add driver for the Ingenic JZ4780 DMA controller") Cc: stable@vger.kernel.org # v4.0 Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reported-by: Artur Rojek <contact@artur-rojek.eu> Tested-by: Artur Rojek <contact@artur-rojek.eu> Link: https://lore.kernel.org/r/20201004140307.885556-1-paul@crapouillou.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-01Merge branch 'topic/tasklet' into nextVinod Koul
2020-10-01dmaengine: pl330: fix argument for taskletVinod Koul
Commit 59cd818763e8 ("dmaengine: fsl: convert tasklets to use new tasklet_setup() API") converted the pl330 driver to use new tasklet functions but missed that driver calls the tasklet function directly as well, so update it. Fixes: 59cd818763e8 ("dmaengine: fsl: convert tasklets to use new tasklet_setup() API") Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20200930121735.49699-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-22dmaengine: dmatest: Return boolean result directly in filter()Andy Shevchenko
There is no need to have a conditional for boolean expression when function returns bool. Drop unnecessary code and return boolean result directly. While at it, drop unneeded casting from void *. Cc: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200922115847.30100-3-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-22dmaengine: dmatest: Check list for emptiness before access its last entryAndy Shevchenko
After writing a garbage to the channel we get an Oops in dmatest_chan_set() due to access to last entry in the empty list. [ 212.670672] BUG: unable to handle page fault for address: fffffff000000020 [ 212.677562] #PF: supervisor read access in kernel mode [ 212.682702] #PF: error_code(0x0000) - not-present page ... [ 212.710074] RIP: 0010:dmatest_chan_set+0x149/0x2d0 [dmatest] [ 212.715739] Code: e8 cc f9 ff ff 48 8b 1d 0d 55 00 00 48 83 7b 10 00 0f 84 63 01 00 00 48 c7 c7 d0 65 4d c0 e8 ee 4a f5 e1 48 89 c6 48 8b 43 10 <48> 8b 40 20 48 8b 78 58 48 85 ff 0f 84 f5 00 00 00 e8 b1 41 f5 e1 Fix this by checking list for emptiness before accessing its last entry. Fixes: d53513d5dc28 ("dmaengine: dmatest: Add support for multi channel testing") Cc: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200922115847.30100-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-22Merge branch 'fixes' into nextVinod Koul
2020-09-22dmaengine: dmatest: Prevent to run on misconfigured channelVladimir Murzin
Andy reported that commit 6b41030fdc79 ("dmaengine: dmatest: Restore default for channel") broke his scripts for the case where "busy" channel is used for configuration with expectation that run command would do nothing. Instead, behavior was (unintentionally) changed to treat such case as under-configuration and progress with defaults, i.e. run command would start a test with default setting for channel (which would use all channels). Restore original behavior with tracking status of channel setter so we can distinguish between misconfigured and under-configured cases in run command and act accordingly. Fixes: 6b41030fdc79 ("dmaengine: dmatest: Restore default for channel") Reported-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200922115847.30100-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: ti: k3-udma-glue: fix channel enable functionsGrygorii Strashko
Now the K3 UDMA glue layer enable functions perform RMW operation on UDMA RX/TX RT_CTL registers to set EN bit and enable channel, which is incorrect, because only EN bit has to be set in those registers to enable channel (all other bits should be cleared 0). More over, this causes issues when bootloader leaves UDMA channel RX/TX RT_CTL registers in incorrect state - TDOWN bit set, for example. As result, UDMA channel will just perform teardown right after it's enabled. Hence, fix it by writing correct values (EN=1) directly in UDMA channel RX/TX RT_CTL registers in k3_udma_glue_enable_tx/rx_chn() functions. Fixes: d70241913413 ("dmaengine: ti: k3-udma: Add glue layer for non DMAengine users") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20200916120955.7963-1-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: iop-adma: Fix pointer cast warningsYueHaibing
drivers/dma/iop-adma.c: In function ‘iop_adma_alloc_chan_resources’: drivers/dma/iop-adma.c:447:13: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] hw_desc = (char *) iop_chan->device->dma_desc_pool; ^ drivers/dma/iop-adma.c:449:4: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] (dma_addr_t) &hw_desc[idx * IOP_ADMA_SLOT_SIZE]; ^ drivers/dma/iop-adma.c: In function ‘iop_adma_probe’: drivers/dma/iop-adma.c:1301:3: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] (void *) adev->dma_desc_pool); Use dma_addr_t for dma_desc_pool, and %pad to print dma_addr_t. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200818115101.55700-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: dw-edma: Fix Using plain integer as NULL pointer in ↵Gustavo Pimentel
dw-edma-v0-debugfs.c Fixes warning given by executing "make C=2 drivers/dma/dw-edma/" Sparse output: drivers/dma/dw-edma/dw-edma-v0-debugfs.c:296:49: warning: Using plain integer as NULL pointer Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/6569fd8ca5ddaa73afef1241ad7978c2a1fae0c7.1600206938.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: mediatek: simplify the return expression of ↵Liu Shixin
mtk_uart_apdma_runtime_resume() Simplify the return expression. Signed-off-by: Liu Shixin <liushixin2@huawei.com> Link: https://lore.kernel.org/r/20200915032622.1772309-1-liushixin2@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: ioat: Make two symbols staticJason Yan
This eliminates the following sparse warning: drivers/dma/ioat/dma.c:29:5: warning: symbol 'completion_timeout' was not declared. Should it be static? drivers/dma/ioat/dma.c:33:5: warning: symbol 'idle_timeout' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jason Yan <yanaijie@huawei.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20200912072158.602585-1-yanaijie@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: sf-pdma: remove unused 'desc'Vinod Koul
'desc' variable is now defined but not used in sf_pdma_donebh_tasklet(), causing this warning: drivers/dma/sf-pdma/sf-pdma.c: In function 'sf_pdma_donebh_tasklet': drivers/dma/sf-pdma/sf-pdma.c:287:23: warning: unused variable 'desc' [-Wunused-variable] Remove this unused variable Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20200914055302.22962-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: zx: remove redundant irqsave in hardIRQBarry Song
Running in hardIRQ context, disabling IRQ is redundant. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Link: https://lore.kernel.org/r/20200912094036.32112-1-song.bao.hua@hisilicon.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-18dmaengine: fsl: convert tasklets to use new tasklet_setup() APIAllen Pais
In preparation for unconditionally passing the struct tasklet_struct pointer to all tasklet callbacks, switch to using the new tasklet_setup() and from_tasklet() to pass the tasklet pointer explicitly. Signed-off-by: Romain Perier <romain.perier@gmail.com> Signed-off-by: Allen Pais <allen.lkml@gmail.com> Link: https://lore.kernel.org/r/20200831134745.314945-1-allen.lkml@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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