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path: root/drivers/gpu/drm/amd
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2023-10-13Revert "drm/amd/display: Setup for mmhubbub3_warmup_mcif with big buffer"Alex Hung
This reverts commit 428542d9177286c01ef7a3dbd026eb00567e06b1. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13Revert "drm/amd/display: Add new set_fc_enable to struct dwbc_funcs"Alex Hung
This reverts commit b79a00a4d4f8fc827ca0fc19e259913a81252f6b. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13Revert "drm/amd/display: Disable DWB frame capture to emulate oneshot"Alex Hung
This reverts commit 77a66faaccc0455fe30e326e9a997aec8d0abed4. [WHY & HOW] The writeback series cause a regression in thunderbolt display. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/display: Revert "drm/amd/display: Use drm_connector in ↵Alex Hung
create_validate_stream_for_sink" This reverts commit c4c182b5488e8d4a48be3327aab14d778cdfe5e7. After this was commit PCON and USB4 issues were observed. A new fix will be submitted instead. Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Expose ras version & schema infoAsad Kamal
Expose ras table version & schema info to sysfs v2: Updated schema to get poison support info from ras context, removed asic specific checks Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Read PSPv13 OS version from registerLijo Lazar
PSP OS updates the version information in register. On APUs with PSPv13, PSP OS will already be loaded with SBIOS. Hence use the version register instead of using information in driver binary header. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/display: add missing NULL check for DML2Bob Zhou
Recently, the driver introduce DML2 for future ASIC support. But, some ASIC's hubbub pointer is null before calling. It cause the below null pointer issue, so add null check to fix it. BUG: kernel NULL pointer dereference, address: 0000000000000000 RIP: 0010:dc_create_resource_pool+0xc1/0x2c0 [amdgpu] Call Trace: <TASK> ? show_regs.cold+0x1a/0x1f ? __die_body+0x20/0x70 ? __die+0x2b/0x37 ? page_fault_oops+0x136/0x2c0 ? do_user_addr_fault+0x303/0x660 ? exc_page_fault+0x77/0x170 ? asm_exc_page_fault+0x27/0x30 ? dc_create_resource_pool+0xc1/0x2c0 [amdgpu] ? dc_create_resource_pool+0x243/0x2c0 [amdgpu] dc_create+0x23f/0x6b0 [amdgpu] ? dmi_matches+0xa3/0x200 amdgpu_dm_init+0x2bd/0x22a0 [amdgpu] Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2") Signed-off-by: Bob Zhou <bob.zhou@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/umsch: enable doorbell for umschLang Yu
Program vcn_doorbell_range with vcn_ring0_1. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/display: make dc_set_power_state() return type `void` againMario Limonciello
As dc_set_power_state() no longer allocates memory, it's not necessary to have return types and check return code as it can't fail anymore. Change it back to `void`. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/display: Destroy DC context while keeping DML and DML2Mario Limonciello
If there is memory pressure at suspend time then dynamically allocating a large structure as part of DC suspend code will fail. Instead re-use the same structures and clear all members except those that should be maintained. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362 Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/display: Catch errors from drm_atomic_helper_suspend()Mario Limonciello
drm_atomic_helper_suspend() can return PTR_ERR(), in which case the error gets stored into `dm->cached_state`. This can cause failures during resume. Catch the error during suspend and fail the suspend instead. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362 Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd: Split up UVD suspend into prepare and suspend stepsMario Limonciello
amdgpu_uvd_suspend() allocates memory and copies objects into that allocated memory. This fails under memory pressure. Instead move majority of this code into a prepare step when swap can still be allocated. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd: Add concept of running prepare_suspend() sequence for IP blocksMario Limonciello
If any IP blocks allocate memory during their hw_fini() sequence this can cause the suspend to fail under memory pressure. Introduce a new phase that IP blocks can use to allocate memory before suspend starts so that it can potentially be evicted into swap instead. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd: Evict resources during PM ops prepare() callbackMario Limonciello
Linux PM core has a prepare() callback run before suspend. If the system is under high memory pressure, the resources may need to be evicted into swap instead. If the storage backing for swap is offlined during the suspend() step then such a call may fail. So move this step into prepare() to move evict majority of resources and update all non-pmops callers to call the same callback. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362 Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: enable GFX IP v11.5.0 CG and PG supportLi Ma
Add CG support for GFX/MC/HDP/ATHUB/IH/BIF. Add PG support for GFX. Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: add support to power up/down UMSCH by SMULang Yu
Power up/down UMSCH by SMU. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: add power up/down UMSCH ppt callbackLang Yu
Add ppt callback to power up/down UMSCH. v2: squash in updates (Alex) Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: add support to powerup VPE by SMULang Yu
Powerup VPE by SMU. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/discovery: add SMU 14 supportLi Ma
add smu 14 into the IP discovery list. Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/swsmu: add smu14 ip supportKenneth Feng
Add initial swSMU support for smu 14 series ASIC. v2: squash in build fixes and updates (Li Ma) fix warnings (Alex) v3: squash in updates (Alex) v4: squash in updates (Alex) v5: squash in avg/current power updates (Alex) Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/swsmu: add smu v14_0_0 pmfw if fileLi Ma
Add initial smu v14_0_0 pmfw if file v2: squash in updates (Alex) Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/swsmu: add smu v14_0_0 ppsmc fileLi Ma
Add initial smu v14_0_0 ppsmc file v2: squash in updates (Alex) v3: squash in updates (Alex) Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/swsmu: add smu v14_0_0 driver if fileLi Ma
Add initial smu v14_0_0 driver if file v2: squash in updates (Alex) v3: update interface (Alex) Signed-off-by: Li Ma <li.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/umsch: power on/off UMSCH by DLDOLang Yu
VCN 4.0.5 uses DLDO. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/umsch: fix psp frontdoor loadingLang Yu
These changes are missed in rebase. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Increase IP discovery region sizeLijo Lazar
IP discovery region has increased to > 8K on some SOCs.Maximum reserve size is upto 12K, but not used. For now increase to 10K. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/pm: Use gpu_metrics_v1_4 for SMUv13.0.6Asad Kamal
Use gpu_metrics_v1_4 for SMUv13.0.6 to fill gpu metric info v3: Removed filling gpu metric instantaneous pcie bw Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/pm: Add gpu_metrics_v1_4Asad Kamal
Add new gpu_metrics_v1_4 to acquire XGMI data transfer, pcie bandwidth & Clock lock status v2: Add pcie error counter to gpu metric table v1_4 Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/pm: Update metric table for smu v13_0_6Asad Kamal
Update pmfw metric table to include xgmi transfer data and pci instantaneous bandwidth for smu v13_0_6 v2: Updated metric table version v3: Removed inst pcie bw with alignment to metrics table version 8 Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Return -EINVAL when MMSCH init status incorrectLin.Cao
Return -EINVAL when MMSCH init fail which can be handle by function amdgpu_device_reset_sriov correctly. Signed-off-by: Lin.Cao <lincao12@amd.com> Reviewed-by: Jingwen Chen <Jingwen.Chen2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amd/pm: wait for completion of the EnableGfxImu commandTim Huang
Wait for completion of sending the EnableGfxImu message when using the PSP FW loading. Signed-off-by: Tim Huang <Tim.Huang@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/vpe: fix insert_nop opsLang Yu
Avoid infinite loop when count is 0. This is missed in rebase. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Address member 'gart_placement' not described in ↵Srinivasan Shanmugam
'amdgpu_gmc_gart_location' Fixes the below: drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c:274: warning: Function parameter or member 'gart_placement' not described in 'amdgpu_gmc_gart_location' Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/vpe: align with mcbp changesLang Yu
MCBP is decided by adev->gfx.mcbp now. This is missed in rebase. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu/vpe: remove IB end boundary requirementLang Yu
Remove IB end boundary requirement, VPE has no such limitions, use existing amdgpu_ring_generic_pad_ib() instead. This is missed in rebase. Signed-off-by: Lang Yu <Lang.Yu@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-13drm/amdgpu: Improve MES responsiveness during oversubscriptionJay Cornwall
When MES is oversubscribed it may not frequently check for new command submissions from driver if the scheduling load is high. Response latency as high as 5 seconds has been observed. Enable a flag which adds a check for new commands between scheduling quantums. Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Cc: Alexandru Tudor <alexandru.tudor@amd.com> Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-11Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Updating drm-misc-next to the state of Linux v6.6-rc2. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2023-10-09drm/amdgpu: fix SI failure due to doorbells allocationIcenowy Zheng
SI hardware does not have doorbells at all, however currently the code will try to do the allocation and thus fail, makes SI AMDGPU not usable. Fix this failure by skipping doorbells allocation when doorbells count is zero. Fixes: 54c30d2a8def ("drm/amdgpu: create kernel doorbell pages") Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amdgpu: add missing NULL checkChristian König
bo->tbo.resource can easily be NULL here. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2902 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org
2023-10-09drm/amd/display: Don't set dpms_off for seamless bootDaniel Miess
[Why] eDPs fail to light up with seamless boot enabled [How] When seamless boot is enabled don't configure dpms_off in disable_vbios_mode_if_required. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amdgpu: fix SI failure due to doorbells allocationIcenowy Zheng
SI hardware does not have doorbells at all, however currently the code will try to do the allocation and thus fail, makes SI AMDGPU not usable. Fix this failure by skipping doorbells allocation when doorbells count is zero. Fixes: 54c30d2a8def ("drm/amdgpu: create kernel doorbell pages") Reviewed-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amdgpu/discovery: enable DCN 3.5.0 supportAaron Liu
Enable DCN 3.5.0 support. Signed-off-by: Aaron Liu <aaron.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amdkfd: get doorbell's absolute offset based on the db_sizeArvind Yadav
Here, Adding db_size in byte to find the doorbell's absolute offset for both 32-bit and 64-bit doorbell sizes. So that doorbell offset will be aligned based on the doorbell size. v2: - Addressed the review comment from Felix. v3: - Adding doorbell_size as parameter to get db absolute offset. v4: Squash the two patches into one. Cc: Christian Koenig <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Arvind Yadav <Arvind.Yadav@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amdgpu: add missing NULL checkChristian König
bo->tbo.resource can easily be NULL here. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2902 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org
2023-10-09drm/amd/display: 3.2.255Aric Cyr
This version brings along following fixes: - Refactor DPG test pattern logic for ODM cases - Refactor HWSS into component folder - Revert "drm/amd/display: Add a check for idle power optimization" - Revert "drm/amd/display: remove duplicated edp relink to fastboot - Update cursor limits based on SW cursor fallback limits - Update stream mask - Update pmfw_driver_if new structure - Modify SMU message logs - Don't set dpms_off for seamless boot Known issue: DWB (Writeback functionality) is broken. Fix will be available in DC 3.2.256 Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amd/display: Disable virtual linksStylon Wang
[Why] This could work around the issue with DP tunneling producing a NULL pointer dereference. [How] Disable the virtual links. Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amd/display: Disable SubVP if test pattern is enabledGeorge Shen
[Why] Enabling DPG causes HUBP to stay in blank constantly. If DPG is enabled while an MCLK switch is taking place with SubVP, it will cause the MCLK to never complete. This is because SubVP MCLK switch relies a HUBP VLine interrupt, which will never occur when HUBP is constantly in blank. [How] Disable SubVP when test pattern is enabled. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amd/display: Refactor DPG test pattern logic for ODM casesGeorge Shen
[Why] Current DPG test pattern logic does not account for ODM configuration changes after test pattern has already been programmed. For example, if ODM2:1 is enabled after test pattern is already being output, the second pipe is not programmed to output test pattern, causing half the screen to be black. [How] Move DPG test pattern parameter calculations into separate function. Whenever ODM pipe configuration changes, re-calculate DPG test pattern parameters and program DPG if test pattern is currently enabled. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amd/display: Don't set dpms_off for seamless bootDaniel Miess
[Why] eDPs fail to light up with seamless boot enabled [How] When seamless boot is enabled don't configure dpms_off in disable_vbios_mode_if_required. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09drm/amd/display: Refactor HWSS into component folderMounika Adhuri
[why] Rename hw_sequencer to hwseq. Move all hwseq files to unique folder hwss. [how] creating hwss repo in dc, and moved the dcnxx_hwseq.c and .h files into corresponding new folders inside the hwss and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Mounika Adhuri <moadhuri@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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