summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd
AgeCommit message (Collapse)Author
2019-08-12drm/amdgpu: add mmhub clock gating for ArcturusLe Ma
Add 2 mmhub instances CG Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: increase CGCG gfx idle threshold for ArcturusLe Ma
Follow the hw spec, and no need to consider gfxoff on Arcturus Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add GFX_CP_LS flag to ArcturusLe Ma
Missed AMD_CG_SUPPORT_GFX_CP_LS accidently when commit patch before drm/amdgpu: enable gfx clock gating for Arcturus Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kevin Wang <kevin1.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: remove ras block's feature status info in sysfsTao Zhou
feature mask info is enough for rocm tool, "cat /sys/class/drm/card0/device/ras/features" will get the info like this: feature mask: 0x3ffb Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amd/powerplay: change smu_read_sensor sequence in smuKenneth Feng
change the smu_read_sensor sequence to: asic specific sensor read -> smu v11 specific sensor read -> smu v11 common sensor read Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: split athub clock gating from mmhubLe Ma
Untie the bind of get/set athub CG state from mmhub, for cosmetic fix and Asic not using mmhub 1.0. Besides, also fix wrong athub CG state in amdgpu_pm_info. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable sdma clock gating for ArcturusLe Ma
Init sdma MGCG/LS flag Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add sdma clock gating for ArcturusLe Ma
Add ARCTURUS case in sdma set clockgating function Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: support sdma clock gating for more instancesLe Ma
Shorten the code with RREG32_SDMA/WREG32_SDMA macro in CG part. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable hdp clock gating for ArcturusLe Ma
Init hdp MGCG/LS flag as Vega20 Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add hdp clock gating for ArcturusLe Ma
Add hdp CGLS for Arcturus in set common clockgating function Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable gfx clock gating for ArcturusLe Ma
Init gfx MGCG/LS and CGCG/LS flag. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add gfx clock gating for ArcturusLe Ma
Add ARCTURUS case in gfx set clockgating function. No 3d clock on Arcturus. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: create mmhub ras frameworkTao Zhou
enable mmhub ras feature and create sysfs/debugfs node for mmhub Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: support mmhub ras in amdgpu rasTao Zhou
call mmhub ras query/inject in amdgpu ras Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add amdgpu_mmhub_funcs definitionTao Zhou
add amdgpu_mmhub_funcs definition and initialize it, prepare for mmhub ras enablement Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add sub block parameter in ras inject commandTao Zhou
ras sub block index could be passed from shell command Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add check to avoid array bound issueGuchun Chen
Sub_block_index can be passed from user level, so add one check before accessing the array first to prevent array index out of bound problem. Signed-off-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amd/powerplay: update smu11_driver_if_navi10.htiancyin
update the smu11_driver_if_navi10.h since navi14 smu fw update to 53.12 Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: tiancyin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amd/powerplay: re-define smu interface version for smu v11tiancyin
[why] navi14 share same defination of smu interface version with navi10, anyone of them update the version may break the other one's version checking. [how] create different version defination, so that they can update their version separately. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: tiancyin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: add navi14 PCI IDAlex Deucher
Add the navi14 PCI device id. Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: Update pitch on page flips without DC as wellMichel Dänzer
DC already handles this correctly since amdgpu minor version 31. Bump the minor version again so that xf86-video-amdgpu can take advantage of this working without DC as well now. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amd/display: Remove drm_dsc_dc.cDavid Francis
This file was accidentally added to the driver during Navi promotion Nothing includes it. No makefile attempts to compile it, and it would fail compilation if they tried Remove it Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com>w Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable vcn clock gating for navi12Xiaojie Yuan
enables vcn medium grained clock gating Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable athub clock gating for navi12Xiaojie Yuan
enables athub medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu/athub2: set clock gating for navi12Xiaojie Yuan
add navi12 define Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable ih clock gating for navi12Xiaojie Yuan
enables ih clock gating Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable mmhub clock gating for navi12Xiaojie Yuan
enables mmhub medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu/mmhub2: set clock gating for navi12Xiaojie Yuan
add navi12 define Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable sdma clock gating for navi12Xiaojie Yuan
enables sdma medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu/sdma5: set sdma clock gating for navi12Xiaojie Yuan
add navi12 define Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable hdp clock gating for navi12Xiaojie Yuan
enables hdp medium grained clock gating and memory light sleep Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12drm/amdgpu: enable gfx clock gatings for navi12Xiaojie Yuan
enables following gfx clock gating features: - medium grained clock gating - medium grained light sleep - coarse grained clock gating - cp memory light sleep - rlc memory light sleep CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12Revert "drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)"Marek Olšák
This reverts commit 9ed2c993d723129f85101e51b2ccc36ef5400a67. SET_CONFIG_REG writes to memory if register shadowing is enabled, causing a VM fault. NGG streamout is unstable anyway, so all UMDs should use legacy streamout. I think Mesa is the only driver using NGG streamout. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-12Merge tag 'drm-next-5.4-2019-08-09' of ↵Dave Airlie
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-09: Same as drm-next-5.4-2019-08-06, but with the readq/writeq stuff fixed and 5.3-rc3 backmerged. amdgpu: - Add navi14 support - Add navi12 support - Add Arcturus support - Enable mclk DPM for Navi - Misc DC display fixes - Add perfmon support for DF - Add scatter/gather display support for Raven - Improve SMU handling for GPU reset - RAS support for GFX - Drop last of drmP.h - Add support for wiping memory on buffer release - Allow cursor async updates for fb swaps - Misc fixes and cleanups amdkfd: - Add navi14 support - Add navi12 support - Add Arcturus support - CWSR trap handlers updates for gfx9, 10 - Drop last of drmP.h - Update MAINTAINERS radeon: - Misc fixes and cleanups - Make kexec more reliable by tearing down the GPU ttm: - Add release_notify callback uapi: - Add wipe memory on release flag for buffer creation Signed-off-by: Dave Airlie <airlied@redhat.com> [airlied: resolved conflicts with ttm resv moving] From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190809184807.3381-1-alexander.deucher@amd.com
2019-08-09Merge tag 'v5.3-rc3' into drm-next-5.4Alex Deucher
Linux 5.3-rc3 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-09drm/amdgpu: remove RREG64/WREG64Tao Zhou
atomic 64 bits REG operations are useless currently Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-09drm/amdgpu: implement UMC 64 bits REG operationsTao Zhou
implement 64 bits operations via 32 bits interface v2: make use of lower_32_bits() and upper_32_bits() macros Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-09drm/amdgpu: replace readq/writeq with atomic64 operationsTao Zhou
what we really want is a read or write that is guaranteed to be 64 bits at a time, atomic64 operations are supported on all architectures Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-09Merge tag 'drm-misc-next-2019-08-08' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.4: UAPI Changes: - HDCP: Add a Content protection type property Cross-subsystem Changes: Core Changes: - Continue to rework the include dependencies - fb: Remove the unused drm_gem_fbdev_fb_create function - drm-dp-helper: Make the link rate calculation more tolerant to non-explicitly defined, yet supported, rates - fb-helper: Map DRM client buffer only when required, and instanciate a shadow buffer when the device has a dirty function or says so - connector: Add a helper to link the DDC adapter used by that connector to the userspace - vblank: Switch from DRM_WAIT_ON to wait_event_interruptible_timeout - dma-buf: Fix a stack corruption - ttm: Embed a drm_gem_object struct to make ttm_buffer_object a superclass of GEM, and convert drivers to use it. - hdcp: Improvements to report the content protection type to the userspace Driver Changes: - Remove drm_gem_prime_import/export from being defined in the drivers - Drop DRM_AUTH usage from drivers - Continue to drop drmP.h - Convert drivers to the connector ddc helper - ingenic: Add support for more panel-related cases - komeda: Support for dual-link - lima: Reduce logging - mpag200: Fix the cursor support - panfrost: Export GPU features register to userspace through an ioctl - pl111: Remove the CLD pads wiring support from the DT - rockchip: Rework to use DRM PSR helpers, fix a bug in the VOP_WIN_GET macro - sun4i: Improve support for color encoding and range - tinydrm: Rework SPI support, improve MIPI-DBI support, move to drm/tiny - vkms: Rework of the CRC tracking - bridges: - sii902x: Add support for audio graph card - tc358767: Rework AUX data handling code - ti-sn65dsi86: Add Debugfs and proper DSI mode flags support - panels - Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191, Boe Himax8279d, Sharp LD-D5116Z01B - Conversion of the device tree bindings to the YAML description - jh057n00900: Rework the enable / disable path - fbdev: - ssd1307fb: Support more devices based on that controller Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190808121423.xzpedzkpyecvsiy4@flea
2019-08-06gpu: drm: amd: powerplay: Remove logically dead codeHariprasad Kelam
Result of pointer airthmentic is never null fix coverity defect:1451876 Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amd/powerplay: Zero initialize some variablesNathan Chancellor
Clang warns (only Navi warning shown but Arcturus warns as well): drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1534:4: warning: variable 'asic_default_power_limit' is used uninitialized whenever '?:' condition is false [-Wsometimes-uninitialized] smu_read_smc_arg(smu, &asic_default_power_limit); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:588:3: note: expanded from macro 'smu_read_smc_arg' ((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1550:30: note: uninitialized use occurs here smu->default_power_limit = asic_default_power_limit; ^~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1534:4: note: remove the '?:' if its condition is always true smu_read_smc_arg(smu, &asic_default_power_limit); ^ drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:588:3: note: expanded from macro 'smu_read_smc_arg' ((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0) ^ drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1517:35: note: initialize the variable 'asic_default_power_limit' to silence this warning uint32_t asic_default_power_limit; ^ = 0 1 warning generated. As the code is currently written, if read_smc_arg were ever NULL, arg would fail to be initialized but the code would continue executing as normal because the return value would just be zero. There are a few different possible solutions to resolve this class of warnings which have appeared in these drivers before: 1. Assume the function pointer will never be NULL and eliminate the wrapper macros. 2. Have the wrapper macros initialize arg when the function pointer is NULL. 3. Have the wrapper macros return an error code instead of 0 when the function pointer is NULL so that the callsites can properly bail out before arg can be used. 4. Initialize arg at the top of its function. Number four is the path of least resistance right now as every other change will be driver wide so do that here. I only make the comment now as food for thought. Fixes: b4af964e75c4 ("drm/amd/powerplay: make power limit retrieval as asic specific") Link: https://github.com/ClangBuiltLinux/linux/issues/627 Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu: Fix GPU reset crash regression.Andrey Grodzovsky
amdgpu_ip_block.status.hw for GMC wasn't set to false on suspend during GPU reset and so on resume gmc_v9_0_resume wasn't called. Caused by 'drm/amdgpu: fix double ucode load by PSP(v3)' Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amd/powerplay: check before issuing messages for max sustainable clocksEvan Quan
Those messages are not supported on Arcturus and should not be issued. Affected ASIC: Arcturus Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu/discovery: move common discovery code out of navi1*_reg_base_init()Xiaojie Yuan
move amdgpu_discovery_reg_base_init() from navi1*_reg_base_init() to a common function nv_reg_base_init(). Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu/soc15: fix external_rev_id for navi14tiancyin
fix the hard code external_rev_id. Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: tiancyin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu: update ras sysfs feature infoTao Zhou
remove confused ras error type info Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amd/powerplay: skip pcie params override on Arcturus V2Evan Quan
This is not supported on Arcturus. Affected ASIC: Arcturus V2: minor cosmetic fix Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu: Fix panic during gpu resetxinhui pan
Clear the flag after hw suspend, otherwise it skips the corresponding hw resume. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-06drm/amdgpu: pin the csb buffer on hw init for gfx v8Likun Gao
Without this pin, the csb buffer will be filled with inconsistent data after S3 resume. And that will causes gfx hang on gfxoff exit since this csb will be executed then. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Tested-by: Paul Gover <pmw.gover@yahoo.co.uk> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3-70-g09d2 (git 2.48.1) at 2025-04-24 08:32:56 +0000