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path: root/drivers/gpu/drm/i915/display/intel_dp_mst.c
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2024-08-28drm/i915/dp_mst: Fix MST state after a sink resetImre Deak
In some cases the sink can reset itself after it was configured into MST mode, without the driver noticing the disconnected state. For instance the reset may happen in the middle of a modeset, or the (long) HPD pulse generated may be not long enough for the encoder detect handler to observe the HPD's deasserted state. In this case the sink's DPCD register programmed to enable MST will be reset, while the driver still assumes MST is still enabled. Detect this condition, which will tear down and recreate/re-enable the MST topology. v2: - Add a code comment about adjusting the expected DP_MSTM_CTRL register value for SST + SideBand. (Suraj, Jani) - Print a debug message about detecting the link reset. (Jani) - Verify the DPCD MST state only if it wasn't already determined that the sink is disconnected. Cc: stable@vger.kernel.org Cc: Jani Nikula <jani.nikula@intel.com> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11195 Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> (v1) Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240823162918.1211875-1-imre.deak@intel.com (cherry picked from commit 594cf78dc36f31c0c7e0de4567e644f406d46bae) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2024-06-19Merge drm/drm-next into drm-intel-nextJani Nikula
Sync to v6.10-rc3. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-06-14drm/i915: Reuse intel_dp_supports_dsc() for MSTVille Syrjälä
intel_dp_supports_dsc() now works for MST as well, reuse it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240517145356.26103-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-06-14drm/i915: Handle MST in intel_dp_has_dsc()Ville Syrjälä
Utilize intel_dp_has_dsc() for MST as well. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240517145356.26103-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-06-13drm/i915/dp_mst: Reset intel_dp->link_trained during disablingImre Deak
Reset the flag indicating an active link after disabling an MST link, similarly to how this is done for SST outputs. This avoids trying to retrain an MST link while its disabled. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-16-imre.deak@intel.com
2024-06-13drm/i915/dp_mst: Align TUs to avoid splitting symbols across MTPsImre Deak
Symbols consisting of multiple (4) TU timeslots may get split across MTPs when using 2 or 1 link lanes. Avoid this, as required by Bspec by aligning the allocated TUs to 2 when using 2 lanes and 4 when using 1 lane. Atm, we also have to align the PBNs used to allocate BW along the MST path, since DRM core keeps track of its own TU value, derived from the PBN and that TU value must match what the driver calculates. On some platforms the alignment is only required on 8b/10b links, a follow-up patch will remove the limitation for those. Bspec: 49266, 68922 Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-2-imre.deak@intel.com
2024-06-13drm/i915/dp_mst: Fix DSC input BPP computationImre Deak
The branch or sink device decompressing a stream may have a limitation on the input/uncompressed BPP, which is lower than the base line BPP (determined by the sink's EDID). In some cases a stream with an input BPP higher than this limit will be converted automatically by the device decompressing the stream, by truncating the BPP, however in some cases - seen at least in Dell dock's DP->HDMI converters - the decompression will fail. Fix the above by limiting the input BPP correctly. This is done already correctly for SST outputs. Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240611153351.3013235-1-imre.deak@intel.com
2024-06-12drm/i915: Rename all bigjoiner to joinerStanislav Lisovskiy
Lets unify both bigjoiner and ultrajoiner under simple "joiner" name, because in future we might have multiple configurations, involving multiple bigjoiners, ultrajoiner, however it is possible to use same api for handling both. v2: - Renamed back some bigjoiner specific parts for now(Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> [vsyrjala: Catch a few more cases] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240607075457.15700-1-stanislav.lisovskiy@intel.com
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_DDI_FUNC_CTL register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/4ccf75561aa0fb209fd71c85e9089b0350570fd6.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-05-21drm/mst: Fix NULL pointer dereference at drm_dp_add_payload_part2Wayne Lin
[Why] Commit: - commit 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload allocation/removement") accidently overwrite the commit - commit 54d217406afe ("drm: use mgr->dev in drm_dbg_kms in drm_dp_add_payload_part2") which cause regression. [How] Recover the original NULL fix and remove the unnecessary input parameter 'state' for drm_dp_add_payload_part2(). Fixes: 5aa1dfcdf0a4 ("drm/mst: Refactor the flow for payload allocation/removement") Reported-by: Leon Weiß <leon.weiss@ruhr-uni-bochum.de> Link: https://lore.kernel.org/r/38c253ea42072cc825dc969ac4e6b9b600371cc8.camel@ruhr-uni-bochum.de/ Cc: lyude@redhat.com Cc: imre.deak@intel.com Cc: stable@vger.kernel.org Cc: regressions@lists.linux.dev Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240307062957.2323620-1-Wayne.Lin@amd.com (cherry picked from commit 4545614c1d8da603e57b60dd66224d81b6ffc305)
2024-04-19drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuffVille Syrjälä
Since all of this lives in intel_dpio_phy.c let's rename the bxt/glk functions to have bxt_dpio_phy_ namespace. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240412175818.29217-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-04-19drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR ratesImre Deak
Enabling the 5k@60Hz uncompressed mode on the MediaTek/Dell U3224KBA monitor results in a blank screen, at least on MTL platforms on UHBR link rates with some (<30) uncompressed bpp values. Enabling compression fixes the problem, so do that for now. Windows enables DSC always if the sink supports it and forcing it to enable the mode without compression leads to the same problem above (which suggests a panel issue with uncompressed mode). The same 5k mode on non-UHBR link rates is not affected and lower resolution modes are not affected either. The problem is similar to the one fixed by the HBLANK expansion quirk on Synaptics hubs, with the difference that the problematic mode has a longer HBLANK duration. Also the monitor doesn't report supporting HBLANK expansion; either its internal MST hub does the expansion internally - similarly to the Synaptics hub - or the issue has another root cause, but still related to the mode's short HBLANK duration. Enable the quirk for the monitor adjusting the detection for the above differences. v2: Rebase on drm_dp_128132b_supported() change. Cc: dri-devel@lists.freedesktop.org Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240417142217.457902-1-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Make HBLANK expansion quirk work for logical portsImre Deak
The DPCD OUI of the logical port on a Dell UHBR monitor - on which the AUX device is used to enable DSC - is all 0. To detect if the HBLANK expansion quirk is required for this monitor use the OUI of the port's parent instead. Since in the above case the DPCD of both the logical port and the parent port reports being a sink device (vs. branch device) type, read the proper sink/branch OUI based on the DPCD device type. This is required by a follow-up patch enabling the quirk for the above Dell monitor. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-11-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limitImre Deak
Instead of checking each compressed bpp value against the maximum DSC/DPT bpp, simplify things by calculating the maximum bpp upfront and limiting the range of bpps looped over using this maximum. While at it add a comment about the origin of the DSC/DPT bpp limit. Bspec: 49259, 68912 Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-7-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTLImre Deak
The DPT/DSC bpp limit should be accounted for on MTL platforms as well, do so. Bspec: 49259 Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-6-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT bpp limitImre Deak
The DSC DPT interface BW limit check should take into account the link clock's (aka DDI clock in bspec) channel coding efficiency overhead. Bspec suggests that the FEC overhead needs to be applied, however HW people claim this isn't the case, nor is any overhead applicable. However based on testing various 5k/6k modes both on the DELL U3224KBA monitor and the Unigraf UCD-500 CTS test device, both the channel coding efficiency (which includes the FEC overhead) and an additional 3% overhead must be accounted for to get these modes working. Bspec: 49259 v2: - Apply an additional 3% overhead, add a commit log and code comment about these overheads and the relation to the Bspec BW limit formula. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-5-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bppImre Deak
The DSC DPT bpp limit check should only fail if the available DPT BW is less than the required BW, fix the check accordingly. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-4-imre.deak@intel.com
2024-04-19drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limitImre Deak
The expected link symbol clock unit when calculating the DSC DPT bpp limit is kSymbols/sec, aligning with the dotclock's kPixels/sec unit based on the crtc clock. As opposed to this port_clock is used - which has a 10 kbits/sec unit - with the resulting symbol clock in 10 kSymbols/sec units (disregarding the rounding error for the 13.5Gbps rate). Fix the calculation using the expected 10x factor. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-3-imre.deak@intel.com
2024-04-12drm/i915: Allow bigjoiner for MSTVidya Srinivas
We need bigjoiner support with MST functionality for MST monitor resolutions > 5K to work. Adding support for the same. v2: Addressed review comments from Jani. Revert rejection of MST bigjoiner modes and add functionality v3: Fixed pipe_mismatch WARN for mst_master_transcoder Credits-to: Manasi Navare <navaremanasi@chromium.org> v4: Utilize intel_crtc_joined_pipe_mask() also for handling bigjoiner slave pipes for MST case(Stan) [v5: vsyrjala: chunked the modeset squence stuff out, removed bogus mst master transcoder hack, keep mgr_lock near the full_pbn check] [v6: vsyrjala: Calculate DSC slices correctly for bigjoiner (Imre)] Reviewed-by: Manasi Navare <navaremanasi@chromium.org> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> Co-developed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240409163502.29633-7-ville.syrjala@linux.intel.com
2024-04-12drm/i915/mst: Add bigjoiner handling to MST modeset sequenceVille Syrjälä
Loop over all joined pipes at relevant points in the MST modeset sequence. Carved out from Vidya's earlier big patch, with naming/etc. changed to match the earlier hsw_crtc_enable() stuff. Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Co-developed-by: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240409163502.29633-6-ville.syrjala@linux.intel.com
2024-04-10drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)Imre Deak
Add a workaround to fix BS-BS jitter issues on MST links, aligning DPT/DPTP MTPs. Bspec: 50050, 55424 Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-4-imre.deak@intel.com
2024-04-10drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)Imre Deak
Add a workaround to fix BS jitter issues on MST links if the HBLANK period is less than 1 MTP. The WA applies only to UHBR rates while on non-UHBR the specification requires disabling it explicitly - presumedly because the register's reset value has the WA enabled. Bspec: 50050, 55424 Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-3-imre.deak@intel.com
2024-04-10drm/i915/adlp: Add MST FEC BS jitter WA (Wa_14013163432)Imre Deak
Add a workaround to fix BS (blank start) to BS jitter issues on MST links when FEC is enabled. Neither Bspec requires this nor Windows clears the WA when disabling the output - presumedly because CHICKEN_MISC_3 gets reset after disabling the pipe/transcoder - so follow suit. Bspec: 50050, 55424 Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-2-imre.deak@intel.com
2024-04-09drm/i915: Pass connector to intel_dp_need_bigjoiner()Ville Syrjälä
Pass the connector explicitly to intel_dp_need_bigjoiner() so that it'll actually check the correct place for the bigjoiner force flag. Tested-by: Vidya Srinivas <vidya.srinivas@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240404213441.17637-11-ville.syrjala@linux.intel.com
2024-04-09drm/i915/mst: Check intel_dp_joiner_needs_dsc()Ville Syrjälä
intel_dp_mst_compute_config() is missing the "does the joiner need DSC?" check despite claiming to have a lot of other joiner/dsc stuff in there (albeit disabled). Replicate the logic from the SST side. TODO: refactor all this duplicated code! Tested-by: Vidya Srinivas <vidya.srinivas@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240404213441.17637-10-ville.syrjala@linux.intel.com
2024-04-09drm/i915: Extract intel_dp_joiner_needs_dsc()Ville Syrjälä
Pull the "does joiner need DSC?" check into a helper. MST will want to use this too at some point. Tested-by: Vidya Srinivas <vidya.srinivas@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240404213441.17637-9-ville.syrjala@linux.intel.com
2024-04-09drm/i915: move max_dotclk_freq to display substructJani Nikula
The info is related to display, and should be placed under i915->display. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ea012aa72c93f3d436ccacf8f75683757d144b82.1712599670.git.jani.nikula@intel.com
2024-04-03drm/i915/mst: Limit MST+DSC to TGL+Ville Syrjälä
The MST code currently assumes that glk+ already supports MST+DSC, which is incorrect. We need to check for TGL+ actually. ICL does support SST+DSC, but supposedly it can't do MST+FEC which will also rule out MST+DSC. Note that a straight TGL+ check doesn't work here because DSC support can get fused out, so we do need to also check 'has_dsc'. Cc: stable@vger.kernel.org Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-6-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Shuffle DP .mode_valid() checksVille Syrjälä
Move some of the more trivial checks in the DP .mode_valid() hooks upwards to lessen the noise amongst the more complex checks. Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-3-ville.syrjala@linux.intel.com
2024-04-03drm/i915: Remove DRM_MODE_FLAG_DBLSCAN checks from .mode_valid() hooksVille Syrjälä
We never set connector->doublescan_allowed, so the probe helper already filters out all doublescan modes for us. Sadly we still need to keep the explicit doublescan checks in .compute_config as outlined in commit e4dd27aadd20 ("drm/i915: Allow DBLSCAN user modes with eDP/LVDS/DSI") Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240402135148.23011-2-ville.syrjala@linux.intel.com
2024-03-05drm/i915/dp: Fix connector DSC HW state readoutImre Deak
The DSC HW state of DP connectors is read out during driver loading and system resume in intel_modeset_update_connector_atomic_state(). This function is called for all connectors though and so the state of DSI connectors will also get updated incorrectly, triggering a WARN there wrt. the DSC decompression AUX device. Fix the above by moving the DSC state readout to a new DP connector specific sync_state() hook. This is anyway the logical place to update the connector object's state vs. the connector's atomic state. Fixes: b2608c6b3212 ("drm/i915/dp_mst: Enable MST DSC decompression for all streams") Reported-and-tested-by: Drew Davenport <ddavenport@chromium.org> Closes: https://lore.kernel.org/all/Zb0q8IDVXS0HxJyj@chromium.org Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240205132631.1588577-1-imre.deak@intel.com
2024-02-27drm/i915/dp: Compute DP tunnel BW during encoder state computationImre Deak
Compute the BW required through a DP tunnel on links with such tunnels detected and add the corresponding atomic state during a modeset. v2: - Fix error check of intel_dp_tunnel_compute_stream_bw(). (Ville) - Move intel_dp_tunnel_atomic_cleanup_inherited_state() to this patch. (Ville) - Move intel_dp_tunnel_atomic_clear_stream_bw() to this patch. Reviewed-by: Uma Shankar <uma.shankar@intel.com> (v1) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-16-imre.deak@intel.com
2024-02-27drm/i915/dp: Add intel_dp_max_link_data_rate()Imre Deak
Add intel_dp_max_link_data_rate() to get the link BW vs. the sink DPRX BW used by a follow-up patch enabling the DP tunnel BW allocation mode. The link BW can be below the DPRX BW due to a BW limitation on a link shared by multiple sinks. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-11-imre.deak@intel.com
2024-02-27drm/i915/dp: Use drm_dp_max_dprx_data_rate()Imre Deak
Instead of intel_dp_max_data_rate() use the equivalent drm_dp_max_dprx_data_rate() which was copied from the former one in a previous patch. Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-6-imre.deak@intel.com
2024-02-27drm/i915/dp: Add support to notify MST connectors to retry modesetsImre Deak
On shared (Thunderbolt) links with DP tunnels, the modeset may need to be retried on all connectors on the link due to a link BW limitation arising only after the atomic check phase. To support this add a helper function queuing a work to retry the modeset on a given port's connector and at the same time any MST connector with streams through the same port. A follow-up change enabling the DP tunnel Bandwidth Allocation Mode will take this into use. v2: - Send the uevent only to enabled MST connectors. (Jouni) Cc: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-5-imre.deak@intel.com
2024-02-13drm/i915: Prevent HW access during init from connector get_modes hooksImre Deak
Prevent accessing the HW from the get_modes hooks of connectors deriving the mode list from the display's EDID. drm_edid_connector_add_modes() will return the mode list based on the EDID which was cached during a previous detection/get_modes call. This also fixes the NULL deref problem (10085) which was introduced/revealed by commit bab87ef4db9a ("drm/i915: Disable hotplug detection handlers during driver init/shutdown") After the above change MST connectors will not change state during driver init/shutdown; thus some of these connectors with no I2C/DDC adapter registered for them (since the given MST port has no sink connected) may stay then in the 'unknown' connector status. The get_modes() hook should not try to use the I2C/DDC adapter in this state (which would lead to the above NULL deref) which this patch ensures. v2: - Remove the redundant check from intel_crt_ddc_get_modes(). - Rebase on latest drm-tip. - Add Fixes: line / related commit notes. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10085 Fixes: bab87ef4db9a ("drm/i915: Disable hotplug detection handlers during driver init/shutdown") Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240212175237.2625812-2-imre.deak@intel.com
2024-01-08drm/i915: Disable hotplug detection handlers during driver init/shutdownImre Deak
As described in the previous two patches an unexpected connector detection can happen during the init/shutdown sequences. Prevent these by returning the connector's current status from the detection handlers. Link: https://patchwork.freedesktop.org/patch/msgid/20240104083008.2715733-10-imre.deak@intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com>
2023-12-13drm/i915: Simplify intel_ddi_compute_min_voltage_level()Ville Syrjälä
Drop the redundant dev_priv parameters from intel_ddi_compute_min_voltage_level() to make life easier. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-9-ville.syrjala@linux.intel.com Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
2023-11-29drm/i915: Clean up some DISPLAY_VER checksVille Syrjälä
Use the >= and < operators for the DISPLAY_VER checks everywhere. This is what most of the code does, but especially recently random pieces of code have started doing this differently for no good reason. Conversion done with the following cocci: @find@ expression i915; constant ver; @@ ( DISPLAY_VER(i915) <= ver | DISPLAY_VER(i915) > ver ) @script:python inc@ old_ver << find.ver; new_ver; @@ coccinelle.new_ver = str(int(old_ver) + 1) @@ expression find.i915; constant find.ver; identifier inc.new_ver; @@ ( - DISPLAY_VER(i915) <= ver + DISPLAY_VER(i915) < new_ver | - DISPLAY_VER(i915) > ver + DISPLAY_VER(i915) >= new_ver ) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-11-29drm/i915/mst: Reject modes that require the bigjoinerVille Syrjälä
We have no bigjoiner support in the MST code, so .mode_valid() pretending otherwise is just going to result black screens for users. Reject any mode that needs the joiner. Cc: stable@vger.kernel.org Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-11-29drm/i915/mst: Fix .mode_valid_ctx() return valuesVille Syrjälä
.mode_valid_ctx() returns an errno, not the mode status. Fix the code to do the right thing. Cc: stable@vger.kernel.org Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-11-29drm/i915: Skip some timing checks on BXT/GLK DSI transcodersVille Syrjälä
Apparently some BXT/GLK systems have DSI panels whose timings don't agree with the normal cpu transcoder hblank>=32 limitation. This is perhaps fine as there are no specific hblank/etc. limits listed for the BXT/GLK DSI transcoders. Move those checks out from the global intel_mode_valid() into into connector specific .mode_valid() hooks, skipping BXT/GLK DSI connectors. We'll leave the basic [hv]display/[hv]total checks in intel_mode_valid() as those seem like sensible upper limits regardless of the transcoder used. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720 Fixes: 8f4b1068e7fc ("drm/i915: Check some transcoder timing minimum limits") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2023-11-23drm/i915: Hoist the encoder->audio_{enable,disable}() calls higher upVille Syrjälä
Push the encoder->audio_{enable,disable}() calls out from the encoder->{enable,disable}() hooks. Moving towards audio fastset. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231121054324.9988-10-ville.syrjala@linux.intel.com
2023-11-23drm/i915: Convert audio enable/disable into encoder vfuncsVille Syrjälä
Add encoder vfuncs for audio enable/disable. This will allow audio to be enabled/disabled during fastsets. An encoder hook is necessary as on pre-hsw platforms different encoder types implement audio in different ways. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231121054324.9988-9-ville.syrjala@linux.intel.com
2023-11-23drm/i915: Push audio enable/disable further outVille Syrjälä
Push the audio enable/disable to be the last/first thing respectively that is done in the encoder enable/disable hooks. The goal is to move it further out of these encoder hooks entirely. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231121054324.9988-5-ville.syrjala@linux.intel.com
2023-11-21drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR ratesImre Deak
Atm the allocated MST PBN value is calculated from the TU size (number of allocated MTP slots) as PBN = TU * pbn_div pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this worked, as pbn_div there is guraranteed to be an integer number, however on UHBR this isn't the case. To get a PBN, TU pair where TU is a properly rounded-up value covering all the BW corresponding to PBN, calculate first PBN and from PBN the TU value. Calculate PBN directly from the effective pixel data rate, instead of calculating it indirectly from the corresponding TU and pbn_div values (which are in turn derived from the pixel data rate and BW overhead). Add a helper function to calculate the effective data rate, also adding a note that callers of intel_dp_link_required() may also need to check the effective data rate (vs. the data rate w/o the BW overhead). While at it add a note to check if WA#14013163432 is applicable. v2: - Fix PBN calculation, deriving it from the effective data rate directly instead of using the indirect TU and pbn_div values for this. - Add a note about WA#14013163432. (Arun) v3: - Fix rounding up quotient while calculating remote_tu. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> (v1) Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231117150929.1767227-3-imre.deak@intel.com
2023-11-21drm/i915/dp_mst: Calculate the BW overhead in ↵Imre Deak
intel_dp_mst_find_vcpi_slots_for_bpp() The next patch will calculate the PBN value directly from the pixel data rate and the BW allocation overhead, not requiring the data, link M/N and TU values for this. To prepare for that move the calculation of BW overheads from intel_dp_mst_compute_m_n() to intel_dp_mst_find_vcpi_slots_for_bpp(). While at it store link_bpp in a .4 fixed point format. Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231116131841.1588781-8-imre.deak@intel.com
2023-11-21drm/dp_mst: Store the MST PBN divider value in fixed point formatImre Deak
On UHBR links the PBN divider is a fractional number, accordingly store it in fixed point format. For now drm_dp_get_vc_payload_bw() always returns a whole number and all callers will use only the integer part of it which should preserve the current behavior. The next patch will fix drm_dp_get_vc_payload_bw() for UHBR rates returning a fractional number for those (also accounting for the channel coding efficiency correctly). Cc: Lyude Paul <lyude@redhat.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Wayne Lin <wayne.lin@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> [Rebased changes in dm_helpers_construct_old_payload() on drm-intel-next] Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231116131841.1588781-2-imre.deak@intel.com
2023-11-14drm/i915/display: Consider fractional vdsc bpp while computing m_n valuesAnkit Nautiyal
MTL+ supports fractional compressed bits_per_pixel, with precision of 1/16. This compressed bpp is stored in U6.4 format. Accommodate this precision while computing m_n values. v1: Replace the computation of 'data_clock' with 'data_clock = DIV_ROUND_UP(data_clock, 16).' (Sui Jingfeng). v2: Rebase and pass bits_per_pixel in U6.4 format. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20231110101020.4067342-4-ankit.k.nautiyal@intel.com
2023-11-14drm/i915/display: Store compressed bpp in U6.4 formatAnkit Nautiyal
DSC parameter bits_per_pixel is stored in U6.4 format. The 4 bits represent the fractional part of the bpp. Currently we use compressed_bpp member of dsc structure to store only the integral part of the bits_per_pixel. To store the full bits_per_pixel along with the fractional part, compressed_bpp is changed to store bpp in U6.4 formats. Intergral part is retrieved by simply right shifting the member compressed_bpp by 4. v2: -Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing with compressed bpp. (Suraj) -Fix comment styling. (Suraj) v3: -Add separate file for 6.4 fixed point helper(Jani, Nikula) -Add comment for magic values(Suraj) v4: -Fix checkpatch warnings caused by renaming(Suraj) v5: -Rebase. -Use existing helpers for conversion of bpp_int to bpp_x16 and vice versa. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Sui Jingfeng <suijingfeng@loongson.cn> Link: https://patchwork.freedesktop.org/patch/msgid/20231110101020.4067342-3-ankit.k.nautiyal@intel.com