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2024-10-03drm/i915/irq: Nuke stale commentsVille Syrjälä
Remove the tall tales about getting passed pipe indices into the .vblank_{enable,disable}() hooks. This hasn't been true since commit 08fa8fd0faa5 ("drm/i915: Switch to per-crtc vblank vfuncs"). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241001195803.3371-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-02move asm/unaligned.h to linux/unaligned.hAl Viro
asm/unaligned.h is always an include of asm-generic/unaligned.h; might as well move that thing to linux/unaligned.h and include that - there's nothing arch-specific in that header. auto-generated by the following: for i in `git grep -l -w asm/unaligned.h`; do sed -i -e "s/asm\/unaligned.h/linux\/unaligned.h/" $i done for i in `git grep -l -w asm-generic/unaligned.h`; do sed -i -e "s/asm-generic\/unaligned.h/linux\/unaligned.h/" $i done git mv include/asm-generic/unaligned.h include/linux/unaligned.h git mv tools/include/asm-generic/unaligned.h tools/include/linux/unaligned.h sed -i -e "/unaligned.h/d" include/asm-generic/Kbuild sed -i -e "s/__ASM_GENERIC/__LINUX/" include/linux/unaligned.h tools/include/linux/unaligned.h
2024-10-02drm/i915/hdcp: fix connector refcountingJani Nikula
We acquire a connector reference before scheduling an HDCP prop work, and expect the work function to release the reference. However, if the work was already queued, it won't be queued multiple times, and the reference is not dropped. Release the reference immediately if the work was already queued. Fixes: a6597faa2d59 ("drm/i915: Protect workers against disappearing connectors") Cc: Sean Paul <seanpaul@chromium.org> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: stable@vger.kernel.org # v5.10+ Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240924153022.2255299-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-10-02drm/i915:Remove unused parameter in marcoHe Lugang
The parameter dev_priv is actually not used in macro PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL,so remove it to simplify the code. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: He Lugang <helugang@uniontech.com> Link: https://patchwork.freedesktop.org/patch/msgid/6C2E07E089F0CB73+20240925064016.733173-1-helugang@uniontech.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-10-02drm/i915: remove IS_LP()Jani Nikula
The .is_lp member of struct intel_device_info and its wrapper IS_LP() are used to identify just four platforms, VLV/CHV/BXT/GLK. It didn't become as important as it was perhaps originally planned. Just remove it, and replace with exact platform identification. In a few places this becomes slightly verbose, but in many places it improves clarity to immediately see the exact platforms. Additionally, this lets us remove the xe compat macro. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930124056.3541988-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-10-01drm/i915: Switch over to gen3 irq code on gen2Ville Syrjälä
The only real reason why we have the gen2 vs. gen3+ split in irq handling is that bspec claims that IIR/IMR/IER/ISR and EMR are only 16 bits on gen2, as opposed to being 32 bits on gen3+. That doesn't seem to be a meaningful distinction as 32bit access to these registers works perfectly fine on gen2 Interestingly the 16 msbs of IMR are in fact hardcoded to 1 on gen2, which to me indicates that 32bit access was the plan all along, and perhaps someone just forgot to update the spec. Nuke the special 16bit gen2 irq code and switch over to the gen3 code. Gen2 doesn't have the ASLE interrupt, which just needs a small tweak in i915_irq_postinstall(). And so far we've not had a codepath that could enable the legacy BLC interrupt on gen2. Now we do, but we'll never actually do it since gen2 machines don't have OpRegion. (and neither do i915/i945 machines btw). On these older platforms the legacy BLC interrupt is meant to be used in conjunction with the LBPC backlight stuff, but we never actually switch off the legacy/combination mode and thus don't use the interrupt either. This was quickly smoke tested on all gen2 variants. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240927143545.8665-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-01drm/i915: Introduce i915_has_legacy_blc_interrupt()Ville Syrjälä
i915_has_asle() is a bit of a mess. It does some kind of partial check whether the platform has the legacy BLC interrupt or not, and then it checks whether OpRegion ASLE is present. Let's split the legacy BLC interrupt check into its own thing, and while at it let's make it accurate. Currently it misses i85x (not a problem since gen2 never has OpRegion, nor do we currently call i915_enable_asle_pipestat() on gen2), and it doesn't reject ILK-M (not that anyone should call this on ILK). The exlusion of VLV/CHV (where one might even consider calling this, being gmch platforms) only happens due to .is_mobile==false. List the platforms that actually do have the legacy BLC interrupt in a bit more explicit fashion. i915gm/i945gm/i965gm/gm45 we can cover with a display_ver+is_mobile check, pnv needs an exception due to having a variant with is_mobile==false, and i85x is the only relevant gen2 platform so easier to handle on its own. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240927143545.8665-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-01drm/i915/bios: Extract soc/intel_rom.cVille Syrjälä
Abstract away the nuts and bolts of the SPI vs. PCI ROM stuff, and hide it all in soc/intel_rom.c so that the VBT code doesn't have to care about this stuff. This leaves intel_bios.c with a single codepath that can focus on the details related to the VBT layout. This should have no functional changes. v2: Rebase due to vbt_signature changes Drop unnecessary cast (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-7-ville.syrjala@linux.intel.com
2024-10-01drm/i915/bios: Extract vbt_signature[]Ville Syrjälä
Replace the three hand rolled "$VBT"s with a vbt_signature[] to avoid accidents. v2: Include terminating '\0' for safety (Jani) Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-6-ville.syrjala@linux.intel.com
2024-10-01drm/i915/bios: Extract intel_spi_read16()Ville Syrjälä
The SPI VBT codepath only knows how to read 4 bytes at a time. So to read the 2 byte vbt_size it masks out the unwanted msbs. Hide that little implementation detail inside a new intel_spi_read16() helper. Alse rename the existing intel_spi_read() to intel_spi_read32() to make it clear what it does. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-5-ville.syrjala@linux.intel.com
2024-10-01drm/i915/bios: Round PCI ROM VBT allocation to multiple of 4Ville Syrjälä
The SPI code rounds the VBT allocation to a multiple of four bytes (presumably because it reads the VBT 4 bytes at a time). Do the same for the PCI ROM side to eliminate pointless differences between the two codepaths. This will make no functional difference. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-4-ville.syrjala@linux.intel.com
2024-10-01drm/i915/bios: Add some size checks to SPI VBT readVille Syrjälä
Unify the SPI vs. PCI ROM VBT read codepaths a bit by pulling some size overflow checks from the PCI side into the SPI side. v2: s/drm_dbg()/drm_dbg_kms()/ Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-3-ville.syrjala@linux.intel.com
2024-10-01drm/i915/bios: Use drm_dbg_kms() consistentlyVille Syrjälä
Replace the few oddball drm_dbg() calls in VBT related code with drm_dbg_kms() as that is what we generally use for all display code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2024-10-01drm/i915/intel_dp: Add support for forcing ultrajoinerAnkit Nautiyal
Allow forcing ultrajoiner through debugfs. v2: Minor refactoring of switch case logic. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-14-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/display: Consider ultrajoiner for computing maxdotclockAnkit Nautiyal
Use the check for ultrajoiner while computing maxdotclock. v2: Add Check for HAS_UNCOMPRESSED_JOINER. (Ville) v3: Remove extraneous newline. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-13-ankit.k.nautiyal@intel.com
2024-10-01drm/i915: Compute config and mode valid changes for ultrajoinerStanislav Lisovskiy
Implement required changes for mode validation and compute config, to support Ultrajoiner. v2: -Drop changes for HDMI. -Separate out DSC changes into another patch. v3: Fix check in can_ultrajoiner. (Ankit) v4: -Unify helper to check joiner requirement. (Ville) -Split patches for ultrajoiner changes for max dsc slices and compressed bpp.(Ankit) v5: Fix check for joiner. (Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-12-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/dp: Simplify helper to get slice count with joinerStanislav Lisovskiy
When bigjoiner is used, we need at least 2 dsc slices per pipe. Modify the condition in intel_dp_dsc_get_slice_count() to reflect the same. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-11-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/dp: Modify compressed bpp limitations for ultrajoinerAnkit Nautiyal
Add compressed bpp limitations for ultrajoiner. v2: Fix the case for 1 pipe. (Ankit) v3: Refactor existing helper separately and add only ultrajoiner limitation. (Ville) v4: Separate out function for ultrajoiner_ram_bits. v5: Make the helper function more concise. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-10-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/dp: Use num_joined_pipes in bigjoiner_bw_max_bppAnkit Nautiyal
Streamline the helper to get max compressed bpp for bigjoiner case, to effectively use num of pipes joined. This will make the addition of ultrajoiner limitations easier and improve redability. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-9-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/dp: Refactor joiner max_bpp calculations into separate functionsAnkit Nautiyal
Currently compressed max_bpp limitations for small joiner ram, big joiner etc are intermingled. Seprate these limitations into separate functions. v2: Use num_joined_pipes in small joiner ram helper and other minor fixes. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-8-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/display/vdsc: Add ultrajoiner support with DSCStanislav Lisovskiy
Add changes to DSC which are required for Ultrajoiner. v2: -Use correct helper for setting bits for bigjoiner secondary. (Ankit) -Use primary/secondary instead of master/slave. (Suraj) v3: Add the ultrajoiner helpers and use it for setting ultrajoiner bits (Ankit) v4: Use num_vdsc_instances *= num_joined_pipes (Ville) v5: Align the helper to get ultrajoiner enabled pipes with other helpers (Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-7-ankit.k.nautiyal@intel.com
2024-10-01drm/i915: Implement hw state readout and checks for ultrajoinerStanislav Lisovskiy
Ultrajoiner mode has some new bits and states to be read out from the hw. Lets make changes accordingly. v2: Fix checkpatch warnings. (Ankit) v3: Add separate functions for computing expected secondary_big/ultrajoiner pipes. (Ankit) v4: -Streamline the helpers for ultrajoiner. (Ville) -Add fixup to accommodate PIPED check for ultrajoiner. (Ville) -Add more Ultrajoiner drm_WARNs. (Ville) v5: Remove spurious newline. (Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-6-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/display: Refactor enable_joiner_pipesAnkit Nautiyal
Pass the current pipe into enabled_joiner_pipes(), and let it figure out the proper bitmasks for us. Since the enabled_joiner_pipes now gets the primary and secondary pipes wrt a given pipe, the helpers to get primary pipe and secondary pipes are no longer required. v2: -Simplify helper get_joiner_primary_pipes. (Ville) -Nuke get_joiner_secondary_pipes. (Ville) -Add more drm_WARNs final primary/secondary pipes. (Ville) v3: Drop ultrajoiner stuff and add it in subsequent patches. (Ville) v4: -Replace input variable name primary_pipes to primary_pipe for enabled_joiner_pipes() -Avoid get_joiner_primary_pipe and use primary_pipes set by enabled_joiner_pipes(). (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-5-ankit.k.nautiyal@intel.com
2024-10-01drm/i915/display: Add macro HAS_ULTRAJOINER()Ankit Nautiyal
Add macro to check if platform supports Ultrajoiner. v2: -Use check for DISPLAY_VER >= 20, and add bmg as a special case. (Ville) -Add check for HAS_DSC. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-4-ankit.k.nautiyal@intel.com
2024-10-01drm/i915: Add bigjoiner and uncompressed joiner hw readout sanity checksStanislav Lisovskiy
Add sanity checks for primary and secondary bigjoiner/uncompressed bitmasks, should make it easier to spot possible issues. v2: -Streamline the expected masks and add few more drm_WARNs. (Ville) -Use %#x format specifier for printing joiner masks. (Ville) -Use struct intel_display instead of struct drm_i915_private. (Ankit) v3: -Rename helper to get expected uncompressed joiner pipes. (Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> (v1) Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-3-ankit.k.nautiyal@intel.com
2024-10-01drm/i915: Split current joiner hw state readoutAnkit Nautiyal
We need to add a new sanity checks and also do some preparations for adding ultrajoiner hw state readout. Lets first split reading of the uncompressed joiner and bigjoiner bit masks into separate functions. v2: Fixed checkpatch warnings (Ankit) v3: Use struct intel_display in the new functions. (Ankit) v4: Use check for bigjoiner before reading the regs. (Ville) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930163549.416410-2-ankit.k.nautiyal@intel.com
2024-09-30Revert "drm/i915/psr: Implement WA to help reach PC10"Jouni Högander
This reverts commit c2579a217799ba577fa39a2a12643a277334e691. Reverting this commit as it is suspected being culprit on regression. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1649 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240930071329.1630583-1-jouni.hogander@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2024-09-30drm/i915/audio: be explicit about intel_wakeref_t conversionsJani Nikula
Use explicit casts to convert between intel_wakeref_t and unsigned long, to not rely on intel_wakeref_t underlying type remaining unsigned long, allowing us to change it as needed. (And yes, this is indeed preparation for changing the typedef for intel_wakeref_t.) Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/9d2a2c2399e70f36e0d68d88136ac688f02988fe.1726680898.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-30drm/i915/display: return 0 instead of false for disabled power wakerefJani Nikula
We can use 0 for intel_wakeref_t, but not false. Fix it. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409190032.ZCHBxK9e-lkp@intel.com/ Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/263b062a37e7b9c345b5d3335282558ac38c5b73.1726680898.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-30drm/i915: use INTEL_WAKEREF_DEF instead of magic -1 for intel_wakeref_tJani Nikula
A number of places rely on the magic -1 to denote INTEL_WAKEREF_DEF. Switch to the macro. Define it for xe as well. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/57e5f1989113be4d63386478d9438cfc35a2a1f7.1726680898.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-30drm/i915/dp: Add helper to compute num pipes requiredAnkit Nautiyal
Add a helper to compute the number of pipes required. This will depend on whether the joiner is required or is forced through the debugfs. If no joiner is required the helper returns 1. v2: -Return 1 if no joiner is required. (Ville) -Change the suffix from joined_pipes to num_pipes. (Ville) -Use number of pipes while calculating joined_pipe masks and max_dotclk. (Ville) v3: Simplify and rename the helper to intel_dp_num_joined_pipes(). Ville v4: Remove redundant 'fallthrough' statement. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926134322.3728021-5-ankit.k.nautiyal@intel.com
2024-09-30drm/i915/display: Modify debugfs for joiner to force n pipesAnkit Nautiyal
At the moment, the debugfs for joiner allows only to force enable/disable pipe joiner for 2 pipes. Modify it to force join 'n' number of pipes, where n is a valid pipe joiner configuration. This will help in case of ultra joiner where 4 pipes are joined. v2: -Fix commit message to state that only valid joiner config can be forced. (Suraj) -Rename the identifiers to have INTEL_BIG/NONE_JOINER_PIPES. (Suraj) v3: -Avoid enum for joiner pipe counts, use bare numbers for better readability. (Ville) -Remove redundant prints from debugfs. (Ville) v4: Return -EINVAL if joiner forced to an invalid value. v5: Remove extra debug message. (Ville) v6: Minor fix in switch case. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926134322.3728021-4-ankit.k.nautiyal@intel.com
2024-09-30drm/i915/display_debugfs: Allow force joiner only if supportedAnkit Nautiyal
Currently we support joiner only for DP encoder. Do not create the debugfs for joiner if DP does not support the joiner. This will also help avoiding cases where config has eDP MSO, with which we do not support joiner. v2: Check for intel_dp_has_joiner and avoid creating debugfs if not supported. (Ville) v3: Remove HAS_BIGJOINER check. (Ville) v4: Reverse checks for connector type and intel_dp_has_joiner(). (Ville) v5: Drop the local variable intel_dp and use intel_attached_dp() directly. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926134322.3728021-3-ankit.k.nautiyal@intel.com
2024-09-30drm/i915/display_device: Add Check HAS_DSC for bigjoinerAnkit Nautiyal
Bigjoiner needs DSC, but DSC might be disabled on some platforms. The platform check itself is not sufficient, so add a check for DSC to reflect that. v2: Modify the commit message to address the DSC fuse case. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926134322.3728021-2-ankit.k.nautiyal@intel.com
2024-09-30drm/i915/hdcp: Retry first read and writes to downstreamSuraj Kandpal
Retry the first read and write to downstream at least 10 times with a 50ms delay if not hdcp2 capable(dock decides to stop advertising hdcp2 capability for some reason). The reason being that during suspend resume Dock usually keep the HDCP2 registers inaccesible causing AUX error. This wouldn't be a big problem if the userspace just kept retrying with some delay while it continues to play low values content but most userpace applications end up throwing an error when it receives one from KMD. This makes sure we give the dock and the sink devices to complete its power cycle and then try HDCP authentication. --v2 -Add more details in comment [Jani] -fix looping condition [Jani] -optimize loop exit condition [Jani] --v3 -Add comment explaining why the loop was added [Ankit] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240927060437.1422942-2-suraj.kandpal@intel.com
2024-09-30drm/i915/vdsc: Add bpc check in intel_dsc_compute_paramsSuraj Kandpal
DSC does not support bpc under 8 according to DSC 1.2a Section 2 Requirements. Return an error if that happens to be the case. --v2 -should be bit_per_component [Mitul/Chaitanya] -Add reference to this restriction [Chaitanya] --v3 -Add the bpc in which we see this warning [Jani] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240926081327.1409518-2-suraj.kandpal@intel.com
2024-09-27drm/i915/hotplug: Add comment for XE_LPD+ SHPD_FILTER_CNT valueSuraj Kandpal
Add the reason for having SHPD_FILTER_CNT value for XE_LPD+ and above as 250us instead of 500us. --v2 -Update commit message [Matt] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240923031007.1058072-4-suraj.kandpal@intel.com
2024-09-27drm/i915/hotplug: Reduce SHPD_FLITER_CNT for ICL and aboveSuraj Kandpal
Reduce SHPD_CNT to 250us for ICL and above as it lines up with DP1.4a(Table3-4) spec. --v2 -Update commit message and comment [Matt] --v3 -drop condition and use value of 250us for ICL and above [Matt] Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240924073450.1261535-2-suraj.kandpal@intel.com
2024-09-25drm/i915/dp: Fix colorimetry detectionVille Syrjälä
intel_dp_init_connector() is no place for detecting stuff via DPCD (except perhaps for eDP). Move the colorimetry stuff into a more appropriate place. Cc: Jouni Högander <jouni.hogander@intel.com> Fixes: 00076671a648 ("drm/i915/display: Move colorimetry_support from intel_psr to intel_dp") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240918190441.29071-1-ville.syrjala@linux.intel.com Reviewed-by: Jouni Högander <jouni.hogander@intel.com> (cherry picked from commit 35dba4834bded843d5416e8caadfe82bd0ce1904) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2024-09-24drm/i915: Set clear color block size to 0x0Ville Syrjälä
We don't use the block size information for the clear color plane. Technically the entire fb is the single block for the single 64B clear color surface, so there is just no way to delcare that as a constant since the fb size can be anything. Define the clear color block size as 0x0 to make things less confusing. We already declared that cpp/chars_per_block=0 for the clear color as well. That also causes the drm core code to mostly ignore the clear color plane, which is exactly what we want since that code doesn't know how to deal with the clear color plane. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240918144445.5716-2-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
2024-09-24drm/i915: Rename variables in ilk_intermedidate_wm()Ville Syrjälä
ilk_compute_intermediate_wm() uses rather poor variable names for its watermark structs. Borrow a better naming convention from the g4x/vlv counterpart code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-8-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-24drm/i915: s/disable_lp_wm/disable_cxsr/Ville Syrjälä
The ilk+ disable_lp_wm boolean has the exact same role as disable_cxsr for gmch platforms. The documentation also still talks about CxSR on ilk+ even theough the way you control it has now change to involve toggling the LP watermarks. Get rid of disable_lp_wm and just use disable_cxsr for ilk+ as well. TODO: Unify even more to not have any gmch vs. ilk+ details in high level modeset code... Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-7-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-24drm/i915: Move the dodgy pre-g4x wm stuff into i9xx_wmVille Syrjälä
As with other watermark calculations, the dodgy pre-g4x update_wm_{pre,post} flag calcultion would like to know if a modeset is about to happen or not, and technically later stages in the atomic_check() may still flag one. In practice that shouldn't happen as we don't have dynamic CDCLK implemented for these old platforms. Regardless it'll be nice to move this old cruft out from the supposedly platform agnostic plane code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-6-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-24drm/i915: Clean up intel_wm_need_update()Ville Syrjälä
intel_wm_need_update() is a mess when it comes to variable names and constness. The checks also keep alternating randomly between 'old != cur' vs. 'cur != old'. Clean it all up. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-5-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-24drm/i915: Extract ilk_must_disable_lp_wm()Ville Syrjälä
Pull the ilk/snb/ivb LP watermark disable checks into a separate function similar to the gmch counterpart (i9xx_must_disable_cxsr()). Reduces the clutter in intel_plane_atomic_calc_changes() significantly. Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-4-ville.syrjala@linux.intel.com
2024-09-24drm/i915: Combine .compute_{pipe,intermediate}_wm() into oneVille Syrjälä
We always call .compute_pipe_wm() and .compute_intermediate_wm() back to back. Just combine them to a single hook for simplicity. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-3-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-24drm/i915: Remove leftover intel_sprite_set_colorkey_ioctl() prototypeVille Syrjälä
intel_sprite_set_colorkey_ioctl() lives in intel_sprice_uapi.{c,h} these days. For some reason the old protoype was left behind in intel_sprite.h and even used by i915_driver.c. Remove the leftovers and switch to including the correct header for the prototype. v2: Drop more unnecessary forward declarations Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240916162413.8555-2-ville.syrjala@linux.intel.com Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
2024-09-23drm/i915/psr: Implement WA to help reach PC10Suraj Kandpal
To reach PC10 when PKG_C_LATENCY is configure we must do the following things 1) Enter PSR1 only when delayed_vblank < 6 lines and DC5 can be entered 2) Allow PSR2 deep sleep when DC5 can be entered 3) DC5 can be entered when all transocoder have either PSR1, PSR2 or eDP 1.5 PR ALPM enabled and VBI is disabled and flips and pushes are not happening. --v2 -Switch condition and do an early return [Jani] -Do some checks in compute_config [Jani] -Do not use register reads as a method of checking states for DPKGC or delayed vblank [Jani] -Use another way to see is vblank interrupts are disabled or not [Jani] --v3 -Use has_psr to check if psr can be enabled or not for dc5_entry cond [Uma] -Move the dc5 entry computation to psr_compute_config [Jouni] -No need to change sequence of enabled and activate, so dont make hsw_psr1_activate return anything [Jouni] -Use has_psr to stop psr1 activation [Jouni] -Use lineage no. in WA -Add the display ver restrictions for WA --v4 -use more appropriate name for check_vblank_limit() [Jouni] -Cover the case for idle frames when dpkgc is not configured [Jouni] -Check psr only for edp [Jouni] --v5 -move psr1 handling to plane update [Jouni] -add todo for cases when vblank is enabled when psr enabled [Jouni] -use intel_display instead of drm_i915_private --v6 -check target_dc_state [Jouni] -fix condition in pre/post plane update [Jouni] --v7 -fix has_psr condition [Uma] -fix typo in commit subject [Uma] -put psr1_wa check in its own helper [Uma] -fix the dc_entry check [Jouni] -use HAS_PSR() to cover two edp one with psr and one nonpsr [Jouni] WA: 22019444797 Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240920091203.1043308-2-suraj.kandpal@intel.com
2024-09-23drm/i915/pps: split intel_pps_reset_all() to vlv and bxt variantsJani Nikula
The intel_pps_reset_all() function does similar but not quite the same things for VLV/CHV and BXT/GLK. Observe that it's called from platform specific code only, and a split to two functions vlv_pps_reset_all() and bxt_pps_reset_all() is natural. Remove the platform checks and warnings from the functions. We don't usually have them, unless we're unsure. To make this easier to reason about for BXT/GLK, change the condition on caller side from "!PCH" to "BXT || GLK". Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240919090427.1859032-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2024-09-23drm/i915/quirks: make intel_dpcd_quirks constJani Nikula
The array can be in rodate, make it const. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240919153354.1269295-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>