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path: root/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
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2020-11-28drm/mediatek: Use correct aliases name for ovlEnric Balletbo i Serra
Aliases property name must include only lowercase and '-', so fix this in the driver, so we're not tempted to do "ovl_2l0 = &ovl_2l0" in the device-tree instead of the right one which is "ovl-2l0 = &ovl_2l0". Fixes: b17bdd0d7a73 ("drm/mediatek: add component OVL_2L0") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-10-15Merge tag 'drm-next-2020-10-15' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull drm updates from Dave Airlie: "Not a major amount of change, the i915 trees got split into display and gt trees to better facilitate higher level review, and there's a major refactoring of i915 GEM locking to use more core kernel concepts (like ww-mutexes). msm gets per-process pagetables, older AMD SI cards get DC support, nouveau got a bump in displayport support with common code extraction from i915. Outside of drm this contains a couple of patches for hexint moduleparams which you've acked, and a virtio common code tree that you should also get via it's regular path. New driver: - Cadence MHDP8546 DisplayPort bridge driver core: - cross-driver scatterlist cleanups - devm_drm conversions - remove drm_dev_init - devm_drm_dev_alloc conversion ttm: - lots of refactoring and cleanups bridges: - chained bridge support in more drivers panel: - misc new panels scheduler: - cleanup priority levels displayport: - refactor i915 code into helpers for nouveau i915: - split into display and GT trees - WW locking refactoring in GEM - execbuf2 extension mechanism - syncobj timeline support - GEN 12 HOBL display powersaving - Rocket Lake display additions - Disable FBC on Tigerlake - Tigerlake Type-C + DP improvements - Hotplug interrupt refactoring amdgpu: - Sienna Cichlid updates - Navy Flounder updates - DCE6 (SI) support for DC - Plane rotation enabled - TMZ state info ioctl - PCIe DPC recovery support - DC interrupt handling refactor - OLED panel fixes amdkfd: - add SMI events for thermal throttling - SMI interface events ioctl update - process eviction counters radeon: - move to dma_ for allocations - expose sclk via sysfs msm: - DSI support for sm8150/sm8250 - per-process GPU pagetable support - Displayport support mediatek: - move HDMI phy driver to PHY - convert mtk-dpi to bridge API - disable mt2701 tmds tegra: - bridge support exynos: - misc cleanups vc4: - dual display cleanups ast: - cleanups gma500: - conversion to GPIOd API hisilicon: - misc reworks ingenic: - clock handling and format improvements mcde: - DSI support mgag200: - desktop g200 support mxsfb: - i.MX7 + i.MX8M - alpha plane support panfrost: - devfreq support - amlogic SoC support ps8640: - EDID from eDP retrieval tidss: - AM65xx YUV workaround virtio: - virtio-gpu exported resources rcar-du: - R8A7742, R8A774E1 and R8A77961 support - YUV planar format fixes - non-visible plane handling - VSP device reference count fix - Kconfig fix to avoid displaying disabled options in .config" * tag 'drm-next-2020-10-15' of git://anongit.freedesktop.org/drm/drm: (1494 commits) drm/ingenic: Fix bad revert drm/amdgpu: Fix invalid number of character '{' in amdgpu_acpi_init drm/amdgpu: Remove warning for virtual_display drm/amdgpu: kfd_initialized can be static drm/amd/pm: setup APU dpm clock table in SMU HW initialization drm/amdgpu: prevent spurious warning drm/amdgpu/swsmu: fix ARC build errors drm/amd/display: Fix OPTC_DATA_FORMAT programming drm/amd/display: Don't allow pstate if no support in blank drm/panfrost: increase readl_relaxed_poll_timeout values MAINTAINERS: Update entry for st7703 driver after the rename Revert "gpu/drm: ingenic: Add option to mmap GEM buffers cached" drm/amd/display: HDMI remote sink need mode validation for Linux drm/amd/display: Change to correct unit on audio rate drm/amd/display: Avoid set zero in the requested clk drm/amdgpu: align frag_end to covered address space drm/amdgpu: fix NULL pointer dereference for Renoir drm/vmwgfx: fix regression in thp code due to ttm init refactor. drm/amdgpu/swsmu: add interrupt work handler for smu11 parts drm/amdgpu/swsmu: add interrupt work function ...
2020-09-17drm/mediatek: Add missing put_device() call in mtk_ddp_comp_init()Yu Kuai
if of_find_device_by_node() succeed, mtk_ddp_comp_init() doesn't have a corresponding put_device(). Thus add put_device() to fix the exception handling for this function implementation. Fixes: d0afe37f5209 ("drm/mediatek: support CMDQ interface in ddp component") Signed-off-by: Yu Kuai <yukuai3@huawei.com> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-08-28drm/mediatek: dpi/dsi: Change the getting possible_crtc wayStu Hsieh
For current mediatek dsi encoder, its possible crtc is fixed in crtc 0, and mediatek dpi encoder's possible crtc is fixed in crtc 1. In some SoC the possible crtc is not fixed in this case, so search pipeline information to find out the correct possible crtc. Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2020-02-25drm/mediatek: Handle component type MTK_DISP_OVL_2L correctlyPhong LE
The larb device remains NULL if the type is MTK_DISP_OVL_2L. A kernel panic is raised when a crtc uses mtk_smi_larb_get or mtk_smi_larb_put. Fixes: b17bdd0d7a73 ("drm/mediatek: add component OVL_2L0") Signed-off-by: Phong LE <ple@baylibre.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2020-01-10drm/mediatek: Add ctm property supportYongqiang Niu
Add ctm property support Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2020-01-09drm/mediatek: support CMDQ interface in ddp componentBibby Hsieh
The CMDQ (Command Queue) in some Mediatek SoC is used to help update all relevant display controller registers with critical time limation. This patch add cmdq interface in ddp_comp interface, let all ddp_comp interface can support cpu/cmdq function at the same time. Signed-off-by: YT Shen <yt.shen@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component OVL_2L1Yongqiang Niu
This patch add component OVL_2L1 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component OVL_2L0Yongqiang Niu
This patch add component OVL_2L0 Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add component DITHERYongqiang Niu
This patch add component DITHER Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-10-09drm/mediatek: add ddp component CCORRYongqiang Niu
This patch add ddp component CCORR Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2019-07-17drm/mediatek: drop use of drmP.hSam Ravnborg
Drop use of the deprecated drmP.h header file. While touching the include files divide them up in blocks in the typical order: \#include <linux/*> \#include <video/*> \#include <drm/*> \#include "" And sort the includes in the blocks Add the necessary includes to fix build after removal of drmP.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Acked-by: Emil Velikov <emil.velikov@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Link: https://patchwork.freedesktop.org/patch/msgid/20190716064220.18157-20-sam@ravnborg.org
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-10-03drm/mediatek: add a error return value when clock driver has been preparedBibby Hsieh
DRM driver get the comp->clk by of_clk_get(), we only assign NULL to comp->clk when error happened, but do not return the error number. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add the DSI1 for component init conditionstu.hsieh@mediatek.com
This patch add the DSI1 for component init condition Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add component DSI3stu.hsieh@mediatek.com
This patch add the component DSI3 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add component DSI2stu.hsieh@mediatek.com
This patch add the component DSI2 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add component DPI1stu.hsieh@mediatek.com
This patch add the component DPI1 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add ddp component PWM2stu.hsieh@mediatek.com
This patch add component PWM2 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add ddp component PWM1stu.hsieh@mediatek.com
This patch add component PWM1 in mtk_ddp_matches Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add ddp component OD1stu.hsieh@mediatek.com
This patch add the component OD1 and rename the OD to OD0 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2018-06-24drm/mediatek: add ddp component AAL1stu.hsieh@mediatek.com
This patch add component AAL1 and rename AAL to AAL0 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
2017-07-26drm: Convert to using %pOF instead of full_nameRob Herring
Now that we have a custom printf format specifier, convert users of full_name to use %pOF instead. This is preparation to remove storing of the full path string for each node. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Russell King <linux@armlinux.org.uk> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: Xinliang Liu <z.liuxinliang@hisilicon.com> Cc: Rongrong Zou <zourongrong@gmail.com> Cc: Xinwei Kong <kong.kongxinwei@hisilicon.com> Cc: Chen Feng <puck.chen@hisilicon.com> Cc: CK Hu <ck.hu@mediatek.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Mark Yao <mark.yao@rock-chips.com> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: Jyri Sarha <jsarha@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Partially-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [seanpaul changed subject prefix and fixed conflict in stm/ltdc.c] Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-06-27drm/mediatek: separate color module to fixup error memory reallocationyt.shen@mediatek.com
Previous patch (c5f228ef6c drm/mediatek: add *driver_data for different hardware settings) calls devm_kfree() and then devm_kzalloc() to reallocate color module data structure. But this reallocation cannnot guarantee the new address is unchanged, but the caller will use the old address, which is wrong. Fix it by separate color module from general components, this patch separate color module to independent files, like mtk_disp_ovl.c and mtk_disp_rdma.c do Fixes: c5f228ef6ccd ("drm/mediatek: add *driver_data for different hardware settings") Signed-off-by: YT Shen <yt.shen@mediatek.com> Tested-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek>
2017-04-08drm/mediatek: add support for Mediatek SoC MT2701yt.shen@mediatek.com
This patch add support for the Mediatek MT2701 DISP subsystem. There is only one OVL engine in MT2701. Signed-off-by: YT Shen <yt.shen@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
2017-04-08drm/mediatek: add BLS componentyt.shen@mediatek.com
Add BLS component for PWM + GAMMA function Signed-off-by: YT Shen <yt.shen@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
2017-04-08drm/mediatek: add *driver_data for different hardware settingsyt.shen@mediatek.com
There are some hardware settings changed, between MT8173 & MT2701: DISP_OVL address offset changed, color format definition changed. DISP_RDMA fifo size changed. DISP_COLOR offset changed. MIPI_TX pll setting changed. And add prefix for mtk_ddp_main & mtk_ddp_ext & mutex_mod. Signed-off-by: YT Shen <yt.shen@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
2016-11-24drm/mediatek: fix a typo of DISP_OD_CFG to OD_RELAYMODEBibby Hsieh
If we want to set the hardware OD to relay mode, we have to set DISP_OD_CFG register rather than OD_RELAYMODE; otherwise, the system will access the wrong address. Change-Id: Ifb9bb4caa63df906437d48b5d5326b6d04ea332a Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
2016-11-18Revert "drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODE"Dave Airlie
This reverts commit 83ba62bc700bab710b22be3a1bf6cf973f754273. Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-10-19drm/mediatek: fix a typo of OD_CFG to OD_RELAYMODEBibby Hsieh
If we want to set the hardware OD to relay mode, we have to set OD_CFG register rather than OD_RELAYMODE; otherwise, the system will access the wrong address. Fixes: 7216436420414144646f5d8343d061355fd23483 ("drm/mediatek: set mt8173 dithering function") Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Acked-by: CK Hu <ck.hu@mediatek.com>
2016-08-11drm/mediatek: set mt8173 dithering functionBibby Hsieh
Some panels only accept bpc (bit per color) 6-bit. But, the default bpc in mt8173 display data path is 8-bit. If we didn't enable dithering function to convert bpc, display cannot show the smooth grayscale image. In mt8173, the dithering function in OD (OverDrive) and GAMMA module, we have to config them with connector->display_mode.bpc when CRTC initial. 1. Clear the default value at *_DITHER_5 and *_DITHER_7 register. 2. Calculate the LSB_ERR_SHIFT bits and ADD_LSHIFT bits two values. i.e. Input bpc of OD is 10 bits, we assume the bpc of panel is 6-bit, so, we need to set 4-bit to LSB_ERR_SHIFT and ADD_LSHIFT bits respectively. 3. Then, set the OD or GAMMA to dithering mode depends on path-1 or path-2. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-11drm/mediatek: Add gamma correction.Bibby Hsieh
Add gamma set function to correct brightness values. It applies arbitrary mapping curve to compensate the incorrect transfer function of the panel. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-11drm/mediatek: Add GAMMA engine basic functionBibby Hsieh
In order to correct brightness values, we have to support gamma funciton on MT8173. In MT8173, we have two engines for supporting gamma function: AAL and GAMMA. This patch add some GAMMA engine basic function, include config, start and stop function. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-08-11drm/mediatek: Add AAL engine basic functionBibby Hsieh
In order to correct brightness values, we have to support gamma funciton on MT8173. In MT8173, we have two engines for supporting gamma function: AAL and GAMMA. This patch add some AAL engine basic function, include config, start and stop function. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.CK Hu
This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: YT Shen <yt.shen@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Mao Huang <littlecvr@chromium.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>