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path: root/drivers/gpu/drm/msm
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2014-11-21drm/msm/mdp4: fix mixer setup for multi-crtc + planesRob Clark
On mdp4 there is a single global LAYERMIXER_IN_CFG register. The previous logic to share that between multiple crtcs didn't actually handle plane-disable very well. Easier just to look at all of the crtcs each time. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: dpms(OFF) cleanupsRob Clark
When disabling the interface (INTF), the change doesn't latch until next vblank, so we need to wait for vblank. Also, to be pedantic, in the crtc, set all the mixer stages to unused. It shouldn't really matter, since at this point we have already disabled the INTF and waited for necessary vblank. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: atomicRob Clark
Convert mdp5 over to atomic helpers. Extend/wrap drm_plane_state to track plane zpos and to keep track of the needed when applying the atomic update. In mdp5's plane->atomic_check() we also need to check for updates which require SMP reallocation, in order to trigger full modeset. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm: atomic fixesRob Clark
Fixes for a couple little issues found in testing. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: remove global mdp5_ctl_mgrRob Clark
A bit cleaner.. and won't resulting in an attempt to kfree() a static global in unload path. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: don't use void * for opaque typesRob Clark
For example, use 'struct mdp5_smp *' everywhere instead of 'void *', but only declare it as 'struct mdp5_smp;' in common headers, so the struct body is still private. The accomplishes the desired modularity while still letting the compiler provide some type checking for us. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm: add multiple CRTC and overlay supportStephane Viau
MDP5 currently support one single CRTC with its private pipe. This change allows the configuration of multiple CRTCs with the possibility to attach several public planes to these CRTCs. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: set rate before enabling clkRob Clark
Set a "safe" rate at first, in order to read out the hw revision. And then after set the optimal value. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: introduce mdp5_cfg moduleStephane Viau
The hardware configuration modification from a version to another is quite consequent. Introducing a configuration module (mdp5_cfg) may make things more clear and easier to access when a new hardware version comes up. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: make SMP module dynamically configurableStephane Viau
The Shared Memory Pool (SMP) has its own limitation, features and state. Some examples are: - the number of Memory Macro Block (MMB) and their size - the number of lines that can be fetched - the state of MMB currently allocated - the computation of number of blocks required per plane - client IDs ... In order to avoid private data to be overwritten by other modules, let's make these private to the SMP module. Some of these depend on the hardware configuration, let's add them to the mdp5_config struct. In some hw configurations, some MMBs are statically tied to RGB pipes and cannot be re-allocated dynamically. This change introduces the concept of MMB static usage and makes sure that dynamic MMB requests are dimensioned accordingly. A note on passing a pipe pointer, instead of client IDs: Client IDs are SMP-related information. Passing PIPE information to SMP lets SMP module to find out which SMP client(s) are used. This allows the SMP module to access the PIPE pointer, which can be used for FIFO watermark configuration. By the way, even though REG_MDP5_PIPE_REQPRIO_FIFO_WM_* registers are part of the PIPE registers, their functionality is to reflect the behavior of the SMP block. These registers access is now restricted to the SMP module. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/hdmi: remove useless krefRob Clark
A left-over from prior to component framework. The original intent was to deal with hdmi getting unloaded before the master component, but that isn't really going to work anyways. These days with the component framework taking care to unload the master component first, we don't have to worry about this. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: get the core clock rate from MDP5 configStephane Viau
The core clock rate depends on the hw configuration. Once we have read the hardware revision, we can set the core clock to its maximum value. Before then, the clock is set at a rate supported by all MDP5 revisions. Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-21drm/msm/mdp5: use irqdomainsRob Clark
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the mdp block. In order to decouple hdmi/eDP/etc, register an irq domain in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup their irqs in their DT nodes as normal. When used with mdp5, instead set the mdp device as the interrupt-parent, as in: mdp: qcom,mdss_mdp@fd900000 { compatible = "qcom,mdss_mdp"; interrupt-controller; #interrupt-cells = <1>; ... }; hdmi: qcom,hdmi_tx@fd922100 { compatible = "qcom,hdmi-tx-8074"; interrupt-parent = <&mdp>; interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */ ... }; There is a slight awkwardness, in that we cannot disable child irqs at the mdp level, they can only be cleared in the child block. So you must not use threaded irq handlers in the child. I'm not sure if there is a better way to deal with that. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: a4xx support for msm-drmAravind Ganesan
Added a4xx GPU support. Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: Handle register offset differences between a3xx and a4xxAravind Ganesan
Register offsets have changed between a3xx and a4xx GPUs. To be able access these registers in common code, we create a lookup table, and set of read-write APIs to access the register through the lookup table. Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org> [robclark: remove REG_ADRENO_UNDEFINED, just use zero, and minor tweaks for latest generated headers] Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: small mmap offset cleanupsRob Clark
Use pre-computed iova when unmapping, to reduce the places we assume iova and mmap offset are (at the moment) the same. And get rid of an extra drm_gem_free_mmap_offset() call (since it is already called from drm_gem_object_release()) Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp4: atomicRob Clark
Convert mdp4 display controller backend to atomic helpers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/hdmi: atomicRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: atomic core bitsRob Clark
The core parts for async commit. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: bit of fb error checkingRob Clark
It's a problem that can't happen yet, since we don't support any multi-planar formats yet. But let's avoid nasty surprises when the time comes. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: fb prepare/cleanupRob Clark
Atomic wants to split the prepare/pin from where we actually program the scanout address (so that any part that can fail is done synchronously). Add some fb/gem apis to make this easier to use from the kms parts. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: remove unused compile-test stubRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: small fence cleanupRob Clark
Give ourselves a way to wait for certain fence #.. makes it easier to wait on a set of bo's, which we'll need for atomic. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp5: drop attached planes tableRob Clark
Simplify things a bit for atomic, gets rid of some bookkeeping, and makes the code cleaner. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp4: drop attached planes tableRob Clark
Simplify things a bit for atomic, gets rid of some bookkeeping, and makes the code cleaner. TODO move iterator macro somewhere common. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp4: don't care about fb in crtcRob Clark
Since we are configuring things via MDP4_PIPE regs in the plane, it seems like setting the dimensions of the primary plane on the OVLP/DMA regs in crtc is unnecessary. This will make life easier when we want to do a nofb modeset. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp5: drop private primary ptrRob Clark
Since primary-plane support in core, we can just use crtc->primary. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/mdp4: drop private primary ptrRob Clark
Since primary-plane support in core, we can just use crtc->primary. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: Fix fbdev for 16- and 24-bit modes.Daniel Thompson
Currently forcing the video mode from the kernel command line (for example video=HDMI-A-1:1280x720-16@60) does not correctly set the number of bits per pixel. This is due to a rather aggressive override in msm_fbdev_create(). This is a particular problem for Android bring up because the software EGL fallbacks don't support 32bpp. Since the overrides are actually the default values anyway then this problem can be trivially fixed by removing the overrides completely. Change was tested by dd'ing a test image to /dev/fb0 with no video= (still 32bpp), video=1920x1080-32@60, video=1920x1080-24@60 and video=1920x1080-16@60 . Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Cc: David Airlie <airlied@linux.ie> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: Allow exported dma-bufs to be mappedDaniel Thompson
Currently msm does not implement gem_prime_mmap. Without this it is not possible to draw onto a dma-buf from userspace (making its very hard to implement the Android rendering model). Fixing this is just a matter of adding a little boilerplate. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/hdmi: refactor bind/initRob Clark
Split up hdmi_init() into hdmi_init() (done at hdmi sub-device bind/probe time) and hdmi_modeset_init() done from master driver's modeset_init(). Anything that can fail due to dependencies on other drivers which may be missing or not probed yet should go in hdmi_init(), so that devm error/cleanup paths work properly. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: update generated headersRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm/adreno: slight init order cleanupRob Clark
Move anything that can fail after call to base class msm_gpu_init(). This way, if we fail, active_list has already been initialized so we don't trip 'WARN_ON(!list_empty(&gpu->active_list))' in msm_gpu_cleanup(). Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: select REGULATORRob Clark
Fixes a potential error, spotted by Felipe with randconfig: ----- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c: In function ‘mdp4_kms_init’: drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:2: error: implicit declaration \ of function ‘devm_regulator_get_exclusive’ [-Werror=implicit-function-declaration] mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd"); ^ drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:16: error: assignment makes \ pointer from integer without a cast [-Werror] mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd"); ^ ----- Also add a brief comment explaining the use of _get_exclusive() Reported-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-15drm: flip-work: change drm_flip_work_init prototypeBoris BREZILLON
Now that we're using lists instead of kfifo to store drm flip-work tasks we do not need the size parameter passed to drm_flip_work_init function anymore. Moreover this function cannot fail anymore, we can thus remove the return code. Modify drm_flip_work_init users to take account of these changes. [airlied: fixed two unused variable warnings] Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-30drm: Pass dma-buf as argument to gem_prime_import_sg_tableMaarten Lankhorst
Allows importing dma_reservation_objects from a dma-buf. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2014-09-24drm: Extract <drm/drm_gem.h>Daniel Vetter
v2: Don't forget git add, noticed by David. Cc: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Acked-by: David Herrmann <dh.herrmann@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-16drm: backmerge tag 'v3.17-rc5' into drm-nextDave Airlie
This is requested to get the fixes for intel and radeon into the same tree for future development work. i915_display.c: fix missing dev_priv conflict.
2014-09-11drm/msm: don't crash if no msm.vram paramRob Clark
If VRAM carveout is used, due to no IOMMU, we should have a default value for msm.vram so that we don't simply crash. Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-11drm/msm/hdmi: fix build break on non-CCF platformsRob Clark
Reported-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-11drm/msm: Change nested function to static functionMark Charlebois
There is currently a nested function in Russel King's tree for the msm HDMI driver. The last nested function was removed from the Linux kernel when the Thinkpad driver was fixed. I believe nested functions are not desired upstream, and it also breaks compilation with clang so here is a patch to change the nested function into static function. The patch works with both clang and gcc. Signed-off-by: Mark Charlebois <charlebm@gmail.com> Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/adreno: push dump/show stuff to base classRob Clark
Add ptr to list of interesting registers to 'struct adreno_gpu' and use that to move most of the debugfs show and register dump bits down into adreno_gpu. This will avoid duplication as support for additional adreno generations is added. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/adreno: bit of init refactoringRob Clark
Push a few bits down into adreno_gpu so they won't have to be duplicated as support for additional adreno generations is added. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/adreno: move decision about what gpu to to loadRob Clark
Move this into into adreno_device, and decide based on gpu revision rather than just assuming a3xx. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/adreno: split adreno device out into it's own fileRob Clark
We'd rather not duplicate these parts as support for additional gpu generations is added. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/mdp4: add LVDS panel supportRob Clark
LVDS panel support uses the LCDC (parallel) encoder. Unlike with HDMI, there is not a separate LVDS block, so no need to split things into a bridge+connector. Nor is there is anything re-used with mdp5. Note that there can be some regulators shared between HDMI and LVDS (in particular, on apq8064, ext_3v3p), so we should not use the _exclusive() variants of devm_regulator_get(). The drm_panel framework is used for panel-specific driver. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm/mdp4: fix blend setup with multiple crtcsRob Clark
In particular, blend_setup() should not overwrite the other crtc's mixer settings. Also, the encoder needs to be able to specify the mixer-id explicitly, since both LVDS and DTV use 'INTF_LVDC_DTV', so we cannot guess the mixer-id from the interface. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm: update generated headersRob Clark
In particular, pick up the definitions for a handful of LVDS related registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm: add driver->set_busid() callbackDavid Herrmann
One step closer to dropping all the drm_bus_* code: Add a driver->set_busid() callback and make all drivers use the generic helpers. Nouveau is the only driver that uses two different bus-types with the same drm_driver. This is totally broken if both buses are available on the same machine (unlikely, but lets be safe). Therefore, we create two different drivers for each platform during module_init() and set the set_busid() callback respectively. Signed-off-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-26drm/msm: Fix missing unlock on error in msm_fbdev_create()Wei Yongjun
Add the missing unlock before return from function msm_fbdev_create() in the error handling case. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Rob Clark <robdclark@gmail.com>