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path: root/drivers/gpu/drm/nouveau/nv50_graph.c
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2010-12-30drm/nv50: sync up gr data error names with rnn, use for nvc0 alsoBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: implement global channel address space on new VM codeBen Skeggs
As of this commit, it's guaranteed that if an object is in VRAM that its GPU virtual address will be constant. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08drm/nv50: import new vm codeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c filesBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow itBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: fix compute object classBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: Keep track of the head a channel is vsync'ing to.Francisco Jerez
In a multihead setup vblank interrupts may end up enabled in both heads. In that case we want to ignore the vblank interrupts coming from the wrong CRTC to avoid tearing and unbalanced calls to drm_vblank_get/put (fdo bug 31074). Reported-by: Felix Leimbach <felix.leimbach@gmx.net> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Implement the pageflip ioctl.Francisco Jerez
nv0x-nv4x should be mostly fine, nv50 doesn't work yet. Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Implement the vblank DRM hooks.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: improve evo error handler when more than just channel 0 activeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nv50: remove excessive alignment of graph/crypt contextsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: only expose the object classes that are supported by the chipsetBen Skeggs
We previously added all the available classes for the entire generation, even though the objects wouldn't work on the hardware. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: store engine type in gpuobj class structsBen Skeggs
We will eventually want to address hw engines other than PGRAPH. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: Refactor context destruction to avoid a lock ordering issue.Francisco Jerez
The destroy_context() engine hooks call gpuobj management functions to release the channel resources, these functions use HARDIRQ-unsafe locks whereas destroy_context() is called with the HARDIRQ-safe context_switch_lock held, that's a lock ordering violation. Push the engine-specific channel destruction logic into destroy_context() and let the hardware-specific code lock and unlock when it's actually needed. Change the engine destruction order to avoid a race in the small gap between pgraph and pfifo context uninitialization. Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03drm/nouveau: add more fine-grained locking to channel list + structuresBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-11-18drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hangBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: Remove implicit argument from nv_wait().Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: remove nouveau_gpuobj_ref completely, replace with sanityBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24drm/nouveau: modify object accessors, offset in bytes rather than dwordsBen Skeggs
Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nv50: cleanup nv50_fifo.cBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: remove ability to use external firmwareBen Skeggs
This was always really a developer option, and if it's really necessary we can hack this in ourselves. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: add instmem flush() hookBen Skeggs
This removes the previous prepare_access() and finish_access() hooks, and replaces it with a much simpler flush() hook. All the chipset-specific code before nv50 has its use removed completely, as it's not required there at all. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-07-13drm/nouveau: Fix a couple of sparse warnings.Francisco Jerez
Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-04-09drm/nv50: Allow using the NVA3 new compute class.Marcin Kościelnicki
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10drm/nv50: Improve PGRAPH interrupt handling.Marcin Kościelnicki
This makes nouveau recognise and report more kinds of PGRAPH errors, as well as prevent GPU lockups resulting from some of them. Lots of guesswork was involved and some part of this is probably incorrect. Some potential-lockuop situations are handled by just resetting a whole PGRAPH subunit, which doesn't sound like a "proper" solution, but seems to work just fine... for now. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-03-10drm/nv50: Remove redundant/incorrect ctxvals initialisation.Marcin Kościelnicki
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised earlier anyway by both our ctxprog generator and blob ctxvals. It's actually incorrect with the generator, since we use different layout on pre-NVA0. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-25drm/nv50: Implement ctxprog/state generation.Marcin Kościelnicki
This removes dependence on external firmware for NV50 generation cards. If the generated ctxprogs don't work for you for some reason, please report it. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-02-10drm/nv50: avoid unloading pgraph context when ctxprog is runningMaarten Maathuis
- We need to disable pgraph fifo access before checking the current channel, otherwise we could still hit a running ctxprog. - The writes to 0x400500 are already handled by pgraph->fifo_access and are therefore redundant, moreover pgraph fifo access should not be reenabled before current context is set as invalid. So remove them altogether. Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14drm/nv50: Fix typo in PGRAPH initialisation.Marcin Kościelnicki
This enables streamout functionality. Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-01-14drm/nv50: wait for pgraph to idle before unloading the contextMaarten Maathuis
This should fix the problem with gpu hangs people have had when closing channels. Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-12-16drm/nv40: implement ctxprog/state generationBen Skeggs
The context programs are *very* simple compared to the ones used by the binary driver. There's notes in nv40_grctx.c explaining most of the things we don't implement. If we discover if/why any of it is required further down the track, we'll handle it then. The PGRAPH state generated for each chipset should match what NVIDIA do almost exactly (there's a couple of exceptions). If someone has a lot of time on their hands, they could figure out the mapping of object/method to PGRAPH register and demagic the initial state a little, it's not terribly important however. At time of commit, confirmed to be working at least well enough for accelerated X (and where tested, for 3D apps) on NV40, NV43, NV44, NV46, NV49, NV4A, NV4B and NV4E. A module option has been added to force the use of external firmware blobs if it becomes required. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2009-12-11drm/nouveau: Add DRM driver for NVIDIA GPUsBen Skeggs
This adds a drm/kms staging non-API stable driver for GPUs from NVIDIA. This driver is a KMS-based driver and requires a compatible nouveau userspace libdrm and nouveau X.org driver. This driver requires firmware files not available in this kernel tree, interested parties can find them via the nouveau project git archive. This driver is reverse engineered, and is in no way supported by nVidia. Support for nearly the complete range of nvidia hw from nv04->g80 (nv50) is available, and the kms driver should support driving nearly all output types (displayport is under development still) along with supporting suspend/resume. This work is all from the upstream nouveau project found at nouveau.freedesktop.org. The original authors list from nouveau git tree is: Anssi Hannula <anssi.hannula@iki.fi> Ben Skeggs <bskeggs@redhat.com> Francisco Jerez <currojerez@riseup.net> Maarten Maathuis <madman2003@gmail.com> Marcin Kościelnicki <koriakin@0x04.net> Matthew Garrett <mjg@redhat.com> Matt Parnell <mparnell@gmail.com> Patrice Mandin <patmandin@gmail.com> Pekka Paalanen <pq@iki.fi> Xavier Chantry <shiningxc@gmail.com> along with project founder Stephane Marchesin <marchesin@icps.u-strasbg.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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