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2016-05-11drm/amd: cleanup remaining spaces and tabs v2Christian König
This is the result of running the following commands: find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \; find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \; find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \; v2: drop changes to DAL and internal headers Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove define for reserved client IDChristian König
Just set it to zero instead. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: remove owner cleanup v2Christian König
The client ID is now unique, so no need to resert the owner fields any more. v2: remove unused variables as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make the VMID owner always 64bitChristian König
Otherwise we could (in theory) run into problems on 32bit systems. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: two minor 80 char fixesChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: hdp flush&inval should always doMonk Liu
This fixes Tonga vm-fault issue when running disaster (a multiple context GL heavy tests), We should always flush & invalidate hdp no matter vm used or not. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-11drm/amd/amdgpu: Enable CG for UVD6 on CarrizoTom St Denis
Tested via vdpau/mpv. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add pipeline sync for compute jobChunming Zhou
hardware ring is async processed, the job is executed in parallel. In some case, this will result vm fault, like jobs with different vmids. This works around a CPC hw issue which will eventually be fixed in fw. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: keep vm in job instead of ib (v2)Monk Liu
ib.vm is a legacy way to get vm, after scheduler implemented vm should be get from job, and all ibs from one job share the same vm, no need to keep ib.vm just move vm field to job. this patch as well add job as paramter to ib_schedule so it can get vm from job->vm. v2: agd: sqaush in: drm/amdgpu: check if ring emit_vm_flush exists in vm flush No vm flush on engines that don't support VM. bug: https://bugs.freedesktop.org/show_bug.cgi?id=95195 Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: make vmid owner be client_idChunming Zhou
Using the pointer is not adequate. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: add client id for every vmChunming Zhou
This adds a unique id for each vm client so we can properly track them. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11drm/amdgpu: fix wrong release of vmid ownerChunming Zhou
The release of the vmid owner was not handled correctly. We need to take the lock and walk the lru list. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-10Merge tag 'mediatek-drm-2016-05-09' of ↵Dave Airlie
git://git.pengutronix.de/git/pza/linux into drm-next MT8173 DRM support - device tree binding documentation for all MT8173 display subsystem components - basic mediatek-drm driver for MT8173 with two optional, currently fixed output paths: - DSI encoder support for DSI and (via bridge) eDP panels - DPI encoder support for output to HDMI bridge - necessary clock tree changes for the DPI->HDMI path - export mtk-smi functions used by mediatek-drm * tag 'mediatek-drm-2016-05-09' of git://git.pengutronix.de/git/pza/linux: clk: mediatek: remove hdmitx_dig_cts from TOP clocks clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output clk: mediatek: make dpi0_sel propagate rate changes drm/mediatek: Add DPI sub driver drm/mediatek: Add DSI sub driver drm/mediatek: Add DRM Driver for Mediatek SoC MT8173. dt-bindings: drm/mediatek: Add Mediatek display subsystem dts binding memory: mtk-smi: export mtk_smi_larb_get/put
2016-05-09Merge tag 'v4.6-rc7' into drm-nextDave Airlie
Merge this back as we've built up a fair few conflicts, and I have some newer trees to pull in.
2016-05-09drm/amdgpu: fix build on aarch64.Dave Airlie
Same fix went in previously for some other files. Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-09Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie
drm-next Mostly cleanups, fixes, and 'struct fence' conversion this time around, with one reservation patch which is a-b Sumit (which the fence conversion patches depend on). * 'msm-next' of git://people.freedesktop.org/~robclark/linux: (25 commits) drm/msm: Drop load/unload drm_driver ops drm/msm: Centralize connector registration/unregistration drm/msm/hdmi: Prevent gpio_free related kernel warnings drm/msm: print offender task name on hangcheck recovery drm/msm: fix leak in failed submit path drm/msm: de-indent submit_create() drm/msm: drop return from gpu->submit() drm/msm/mdp4: Don't manage DSI PLL regulators in MDP driver drm/msm/edp: Drop regulator_set_voltage call drm/msm/dsi: Fix regulator API abuse drm/msm: Move call to PTR_ERR_OR_ZERO after reassignment drm/msm/mdp: Add support for more RGBX formats drm: msm: remove unused variable drm/msm: fix ->last_fence() after recover drm/msm: 'struct fence' conversion drm/msm: remove fence_cbs drm/msm: introduce msm_fence_context drm/msm: split locking and pinning BO's drm/msm/gpu: simplify tracking in-flight bo's drm/msm: split out timeout_to_jiffies helper ...
2016-05-09Merge tag 'topic/drm-misc-2016-05-08' of ↵Dave Airlie
git://anongit.freedesktop.org/drm-intel into drm-next Refcounting is hard, so here's a quick pull request with the one-liner to fix up i915. Otherwise just a few other small things I picked up. Plus the regression fix from Marten for rmfb behaviour that lingered around forever since no testers. Feel free to cherry-pick that over to drm-fixes, but given that there's not many who seemed to have cared, meh. * tag 'topic/drm-misc-2016-05-08' of git://anongit.freedesktop.org/drm-intel: drm/i915: Correctly refcount connectors in hw state readou drm/panel: Flesh out kerneldoc drm: Add gpu.tmpl docbook to MAINTAINERS entry drm/core: Do not preserve framebuffer on rmfb, v4. drm: Fix up markup fumble drm/fb_helper: Fix a few typos
2016-05-08drm/msm: Drop load/unload drm_driver opsArchit Taneja
The load/unload drm_driver ops are deprecated. They should be removed as they result in creation of devices visible to userspace even before the drm_device is registered. Drop these ops and use drm_dev_alloc/register and drm_dev_unregister/unref to explicitly create and destroy the drm device in the msm platform driver's bind and unbind ops. With this in use, the drm connectors are only registered once the drm_device is registered. It also fixes the issue of stray debugfs files after the msm module is removed. With this, all the debugfs files are removed, and allows successive module insertions/removals. Signed-off-by: Archit Taneja <architt@codeaurora.org>
2016-05-08drm/msm: Centralize connector registration/unregistrationArchit Taneja
Move the drm_connector registration from the encoder(HDMI/DSI etc) drivers to the msm platform driver. This will simplify the task of ensuring that the connectors are registered only after the drm_device itself is registered. The connectors' destroy ops are made to use kzalloc instead of devm_kzalloc to ensure that that the connectors can be successfully unregistered when the msm driver module is removed. The memory for the connectors is unallocated when drm_mode_config_cleanup() is called during either during an error or during driver remove. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/hdmi: Prevent gpio_free related kernel warningsArchit Taneja
Calling the legacy gpio_free on an invalid GPIO (a GPIO numbered -1) results in kernel warnings. This causes a lot of backtraces when we try to unload the drm/msm module. Call gpio_free only on valid GPIOs. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: print offender task name on hangcheck recoveryRob Clark
Track the pid per submit, so we can print the name of the task which submitted the batch that caused the gpu to hang. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: fix leak in failed submit pathRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: de-indent submit_create()Rob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: drop return from gpu->submit()Rob Clark
At this point, there is nothing left to fail. And submit already has a fence assigned and is added to the submit_list. Any problems from here on out are asynchronous (ie. hangcheck/recovery). Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/mdp4: Don't manage DSI PLL regulators in MDP driverArchit Taneja
The MDP4 driver tries to request and set voltages for regulators required by the DSI PLLs. Firstly, the MDP4 driver shouldn't manage the DSI regulators, this should be handled in the DSI driver. Secondly, it shouldn't try to set a fixed voltage for regulators. Voltage constraints should be specified on the regulator via DT and managed by the regulator core. Remove all the DSI PLL regulator related code from the MDP4 driver. It's managed in the DSI driver for MSM8960/APQ8064 already. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/edp: Drop regulator_set_voltage callArchit Taneja
The eDP driver tries to set a fixed voltage for one of its regulators(vdda) before enabling it. This shouldn't be done by the driver, the voltage constraints should be specified on the regulator via DT and managed by the regulator core. A driver should call regulator_set_voltage only if it needs to change the voltage during runtime. Drop the regulator_set_voltage call. Mention in a comment the voltage that the regulator expects. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/dsi: Fix regulator API abuseArchit Taneja
The voltage changing code in this driver is broken and should be removed. The driver sets a single, exact voltage on probe. Unless there is a very good reason for this (which should be documented in comments) constraints like this need to be set via the machine constraints, voltage setting in a driver is expected to be used in cases where the voltage varies at runtime. In addition client drivers should almost never be calling regulator_can_set_voltage(), if the device needs to set a voltage it needs to set the voltage and the regulator core will handle the case where the regulator is fixed voltage. If the driver simply skips setting the voltage if it doesn't have permission then it should just not bother in the first place. Originally authored by Mark Brown <broonie@kernel.org> Remove the min/max voltage data entries per SoC managed by the driver. These aren't needed as we don't try to set voltages any more. Mention in comments the voltages that each regulator expects. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: Move call to PTR_ERR_OR_ZERO after reassignmentVaishali Thakkar
Here, a location is reset to NULL before being passed to PTR_ERR. So, PTR_ERR should be called before its argument is reassigned to NULL. Further to simplify things use PTR_ERR_OR_ZERO instead of PTR_ERR and IS_ERR. Problem found using Coccinelle. Signed-off-by: Vaishali Thakkar <vaishali.thakkar@oracle.com> Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> [fixed fmt string warning (s/%ld/%d/)] Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/mdp: Add support for more RGBX formatsRob Herring
Android needs XBGR8888 format. Add all the missing 32-bpp formats without alpha for completeness. Cc: Archit Taneja <architt@codeaurora.org> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm: msm: remove unused variableArnd Bergmann
A recent cleanup removed the only user of the 'kms' variable in msm_preclose(), causing a harmless compiler warning: drivers/gpu/drm/msm/msm_drv.c: In function 'msm_preclose': drivers/gpu/drm/msm/msm_drv.c:468:18: error: unused variable 'kms' [-Werror=unused-variable] This removes the variable as well. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: 4016260ba47a ("drm/msm: fix bug after preclose removal") Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: fix ->last_fence() after recoverRob Clark
It is no longer true that we discard all in-flight submits on recover (these days we only discard the first one that hung). After the first re-submitted batch completes it would overwrite the fence with a correct value, but there would be a window of time which showed all re-submitted batches as already complete. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: 'struct fence' conversionRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: remove fence_cbsRob Clark
This was only used for atomic commit these days. So instead just give atomic it's own work-queue where we can do a block on each bo in turn. Simplifies things a whole bunch and makes the 'struct fence' conversion easier. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: introduce msm_fence_contextRob Clark
Better encapsulate the per-timeline stuff into fence-context. For now there is just a single fence-context, but eventually we'll also have one per-CRTC to enable fully explicit fencing. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: split locking and pinning BO'sRob Clark
Split up locking and pinning buffers in the submit path. This is needed because we'll want to insert fencing in between the two steps. This makes things end up looking more similar to etnaviv submit code (which was originally modelled on the msm code but has already added 'struct fence' support). Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm/gpu: simplify tracking in-flight bo'sRob Clark
Since we already track the array of bo's in the submit object, just unconditionally take and drop ref's per submit (rather than only taking ref's if bo is not already active). This simplifies later patches. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: split out timeout_to_jiffies helperRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: use imported dmabuf's reservation objectRob Clark
This was always the intention, but somehow it was never wired up properly. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: move fence code to it's own fileRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: move debugfs code to it's own fileRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-08drm/msm: make HDCP support optionalRob Clark
It is already optional at runtime. But this at least simplifies backports to kernels without QCOM_SCM. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-05-06drm/mediatek: Add DPI sub driverJie Qiu
Add DPI connector/encoder to support HDMI output via the attached HDMI bridge. Signed-off-by: Jie Qiu <jie.qiu@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06drm/mediatek: Add DSI sub driverCK Hu
This patch add a drm encoder/connector driver for the MIPI DSI function block of the Mediatek display subsystem and a phy driver for the MIPI TX D-PHY control module. Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.CK Hu
This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: YT Shen <yt.shen@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Mao Huang <littlecvr@chromium.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2016-05-06drm/i915: Correctly refcount connectors in hw state readouDaniel Vetter
This was forgotten when adding the the refcounting to drm_connector_state. v2: Don't forget to unreference existing connectors. This isn't relevant on driver load, but this code also runs on resume, and there we already have an atomic state. Spotted by Chris Wilson. Cc: Gabriel Feceoru <gabriel.feceoru@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Marius Vlad <marius.c.vlad@intel.com> Cc: Dave Airlie <airlied@redhat.com> Fixes: d2307dea14a4 ("drm/atomic: use connector references (v3)") Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1462541943-19620-1-git-send-email-daniel.vetter@ffwll.ch
2016-05-06drm/panel: Flesh out kerneldocThierry Reding
Write more complete kerneldoc comments for the DRM panel API and integrate the helpers in the DRM DocBook reference. Signed-off-by: Thierry Reding <treding@nvidia.com>drm/panel: Add helper for simple panel connector Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20160506140137.GA4641@ulmo.ba.sec
2016-05-06Merge branch 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu into ↵Dave Airlie
drm-next fsl-dcu pixel clock polarity support * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: use bus_flags for pixel clock polarity drm: introduce bus_flags in drm_display_info
2016-05-06Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next This is the first big radeon/amdgpu pull request for 4.7. Highlights: - Polaris support in amdgpu Current display stack on par with other asics, for advanced features DAL is required Power management support Support for GFX, Compute, SDMA, UVD, VCE - VCE and UVD init/fini cleanup in radeon - GPUVM improvements - Scheduler improvements - Clockgating improvements - Powerplay improvements - TTM changes to support driver specific LRU update mechanism - Radeon support for new Mesa features - ASYNC pageflip support for radeon - Lots of bug fixes and code cleanups * 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits) drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER() drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh drm/amdgpu/uvd6: add bypass support for fiji (v3) drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2) drm/powerplay: add missing clockgating callback for tonga drm/amdgpu: Constify some tables drm/amd/powerplay: Delete dead struct declaration drm/amd/powerplay/hwmgr: don't add invalid voltage drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers drm/radeon: add cayman VM support for append packet. drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie drm/amd/amdgpu: Drop print_status callbacks. drm/amd/powerplay: revise reading/writing pptable on Polaris10 drm/amd/powerplay: revise reading/writing pptable on Tonga drm/amd/powerplay: revise reading/writing pptable on Fiji drm/amd/powerplay: revise caching the soft pptable and add it's size drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2) drm/amd/powerplay: fix fan speed percent setting error on Polaris10 drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris ...
2016-05-05drm/fsl-dcu: use bus_flags for pixel clock polarityStefan Agner
The drivers current default configuration drives the pixel data on rising edge of the pixel clock. However, most display sample data on rising edge... This leads to color shift artefacts visible especially at edges. This patch changes the relevant defines to be useful and actually set the bits, and changes pixel clock polarity to drive the pixel data on falling edge by default. The patch also adds an explicit pixel clock polarity flag to the display introduced with the driver (NEC WQVGA "nec,nl4827hc19-05b") using the new bus_flags field to retain the initial behavior. Signed-off-by: Stefan Agner <stefan@agner.ch>
2016-05-05drm: introduce bus_flags in drm_display_infoStefan Agner
Introduce bus_flags to specify display bus properties like signal polarities. This is useful for parallel display buses, e.g. to specify the pixel clock or data enable polarity. Suggested-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Manfred Schlaegl <manfred.schlaegl@gmx.at> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Stefan Agner <stefan@agner.ch>