summaryrefslogtreecommitdiff
path: root/drivers/phy
AgeCommit message (Collapse)Author
2024-03-21Merge tag 'usb-6.9-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB / Thunderbolt updates from Greg KH: "Here is the big set of USB and Thunderbolt changes for 6.9-rc1. Lots of tiny changes and forward progress to support new hardware and better support for existing devices. Included in here are: - Thunderbolt (i.e. USB4) updates for newer hardware and uses as more people start to use the hardware - default USB authentication mode Kconfig and documentation update to make it more obvious what is going on - USB typec updates and enhancements - usual dwc3 driver updates - usual xhci driver updates - function USB (i.e. gadget) driver updates and additions - new device ids for lots of drivers - loads of other small updates, full details in the shortlog All of these, including a "last minute regression fix" have been in linux-next with no reported issues" * tag 'usb-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (185 commits) usb: usb-acpi: Fix oops due to freeing uninitialized pld pointer usb: gadget: net2272: Use irqflags in the call to net2272_probe_fin usb: gadget: tegra-xudc: Fix USB3 PHY retrieval logic phy: tegra: xusb: Add API to retrieve the port number of phy USB: gadget: pxa27x_udc: Remove unused of_gpio.h usb: gadget/snps_udc_plat: Remove unused of_gpio.h usb: ohci-pxa27x: Remove unused of_gpio.h usb: sl811-hcd: only defined function checkdone if QUIRK2 is defined usb: Clarify expected behavior of dev_bin_attrs_are_visible() xhci: Allow RPM on the USB controller (1022:43f7) by default usb: isp1760: remove SLAB_MEM_SPREAD flag usage usb: misc: onboard_hub: use pointer consistently in the probe function usb: gadget: fsl: Increase size of name buffer for endpoints usb: gadget: fsl: Add of device table to enable module autoloading usb: typec: tcpm: add support to set tcpc connector orientatition usb: typec: tcpci: add generic tcpci fallback compatible dt-bindings: usb: typec-tcpci: add tcpci fallback binding usb: gadget: fsl-udc: Replace custom log wrappers by dev_{err,warn,dbg,vdbg} usb: core: Set connect_type of ports based on DT node dt-bindings: usb: Add downstream facing ports to realtek binding ...
2024-03-16Merge tag 'phy-for-6.9' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "New hardware support: - Qualcomm X1E80100 PCIe phy support, SM8550 PCIe1 PHY, SC7180 UFS PHY and SDM630 USBC support - Rockchip HDMI/eDP Combo PHY driver - Mediatek MT8365 CSI phy driver Updates: - Rework on Qualcomm phy PCS registers and type-c handling - Cadence torrent phy updates for multilink configuration - TI gmii resume support" * tag 'phy-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (41 commits) phy: constify of_phandle_args in xlate phy: ti: tusb1210: Define device IDs phy: ti: tusb1210: Use temporary variable for struct device phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver dt-bindings: phy: Add Rockchip HDMI/eDP Combo PHY schema phy: ti: gmii-sel: add resume support phy: mtk-mipi-csi: add driver for CSI phy dt-bindings: phy: add mediatek MIPI CD-PHY module v0.5 phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200 phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1 phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() API dt-bindings: phy: qmp-ufs: Fix PHY clocks phy: qcom: sgmii-eth: move PCS registers to separate header phy: qcom: sgmii-eth: use existing register definitions phy: qcom: qmp-usbc: drop has_pwrdn_delay handling phy: qcom: qmp: move common bits definitions to common header phy: qcom: qmp: split DP PHY registers to separate headers ...
2024-03-07phy: tegra: xusb: Add API to retrieve the port number of phyWayne Chang
This patch introduces a new API, tegra_xusb_padctl_get_port_number, to the Tegra XUSB Pad Controller driver. This API is used to identify the USB port that is associated with a given PHY. The function takes a PHY pointer for either a USB2 PHY or USB3 PHY as input and returns the corresponding port number. If the PHY pointer is invalid, it returns -ENODEV. Cc: stable@vger.kernel.org Signed-off-by: Wayne Chang <waynec@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20240307030328.1487748-2-waynec@nvidia.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-03-06phy: qcom-qmp-combo: fix type-c switch registrationJohan Hovold
Due to a long-standing issue in driver core, drivers may not probe defer after having registered child devices to avoid triggering a probe deferral loop (see fbc35b45f9f6 ("Add documentation on meaning of -EPROBE_DEFER")). Move registration of the typec switch to after looking up clocks and other resources. Note that PHY creation can in theory also trigger a probe deferral when a 'phy' supply is used. This does not seem to affect the QMP PHY driver but the PHY subsystem should be reworked to address this (i.e. by separating initialisation and registration of the PHY). Fixes: 2851117f8f42 ("phy: qcom-qmp-combo: Introduce orientation switching") Cc: stable@vger.kernel.org # 6.5 Cc: Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240217150228.5788-7-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-06phy: qcom-qmp-combo: fix drm bridge registrationJohan Hovold
Due to a long-standing issue in driver core, drivers may not probe defer after having registered child devices to avoid triggering a probe deferral loop (see fbc35b45f9f6 ("Add documentation on meaning of -EPROBE_DEFER")). This could potentially also trigger a bug in the DRM bridge implementation which does not expect bridges to go away even if device links may avoid triggering this (when enabled). Move registration of the DRM aux bridge to after looking up clocks and other resources. Note that PHY creation can in theory also trigger a probe deferral when a 'phy' supply is used. This does not seem to affect the QMP PHY driver but the PHY subsystem should be reworked to address this (i.e. by separating initialisation and registration of the PHY). Fixes: 35921910bbd0 ("phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE") Fixes: 1904c3f578dc ("phy: qcom-qmp-combo: Introduce drm_bridge") Cc: stable@vger.kernel.org # 6.5 Cc: Bjorn Andersson <quic_bjorande@quicinc.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240217150228.5788-6-johan+linaro@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23phy: constify of_phandle_args in xlateKrzysztof Kozlowski
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-16phy: ti: tusb1210: Define device IDsAndy Shevchenko
Define device IDs since some of them are being used more than once. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240209160334.2304230-3-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-16phy: ti: tusb1210: Use temporary variable for struct deviceAndy Shevchenko
Use temporary variable for struct device to make code neater. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20240209160334.2304230-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-16phy: qcom-qmp-usb: fix v3 offsets dataDmitry Baryshkov
The MSM8996 platform has registers setup different to the rest of QMP v3 USB platforms. It has PCS region at 0x600 and no PCS_MISC region, while other platforms have PCS region at 0x800 and PCS_MISC at 0x600. This results in the malfunctioning USB host on some of the platforms. The commit f74c35b630d4 ("phy: qcom-qmp-usb: fix register offsets for ipq8074/ipq6018") fixed the issue for IPQ platforms, but missed the SDM845 which has the same register layout. To simplify future platform addition and to make the driver more future proof, rename qmp_usb_offsets_v3 to qmp_usb_offsets_v3_msm8996 (to mark its peculiarity), rename qmp_usb_offsets_ipq8074 to qmp_usb_offsets_v3 and use it for SDM845 platform. Fixes: 2be22aae6b18 ("phy: qcom-qmp-usb: populate offsets configuration") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240213133824.2218916-1-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-16phy: rockchip: Add Samsung HDMI/eDP Combo PHY driverCristian Ciocaltea
Add driver for the HDMI/eDP TX Combo PHY found on Rockchip RK3588 SoC. The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL and eDP links. The maximum data rate is 12Gbps (FRL), while the minimum is 250Mbps (TMDS). Only the TMDS link is currently supported. Co-developed-by: Algea Cao <algea.cao@rock-chips.com> Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20240214-phy-hdptx-v4-2-e7974f46c1a7@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: ti: gmii-sel: add resume supportThomas Richard
The resume callback restores the submode of each PHY. It uses the submode stored in struct phy_gmii_sel_phy_priv (variable phy_if_mode). The submode was saved by the set_mode PHY operation. Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://lore.kernel.org/r/20240125171754.773909-1-thomas.richard@bootlin.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: mtk-mipi-csi: add driver for CSI phyPhi-bang Nguyen
This is a new driver that supports the MIPI CSI CD-PHY version 0.5 The number of PHYs depend on the SoC. Each PHY can support D-PHY only or CD-PHY configuration. The driver supports only D-PHY mode, so CD-PHY compatible PHY are configured in D-PHY mode. [Julien Stephan: simplify driver model: one instance per phy vs one instance for all phys] Signed-off-by: Louis Kuo <louis.kuo@mediatek.com> Signed-off-by: Phi-bang Nguyen <pnguyen@baylibre.com> [Julien Stephan: refactor code] Co-developed-by: Julien Stephan <jstephan@baylibre.com> Signed-off-by: Julien Stephan <jstephan@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240111101738.468916-1-jstephan@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) ↵Swapnil Jakhade
multilink config for TI J7200 Add a separate compatible and registers map table for TI J7200. TI J7200 uses Torrent SD0805 version which is a special version derived from Torrent SD0801 with some differences in register configurations. Add register sequences for USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200. USXGMII uses PLL0 and SGMII/QSGMII uses PLL1. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240104133013.2911035-6-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) ↵Swapnil Jakhade
multilink configuration Add register sequences for USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration. USXGMII uses PLL0 and SGMII/QSGMII uses PLL1. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240104133013.2911035-4-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink ↵Swapnil Jakhade
configuration Torrent PHY can have separate input reference clocks for PLL0 and PLL1. Add support for dual reference clock multilink configurations. Add register sequences for PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration. PCIe uses PLL0 and USXGMII uses PLL1. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240104133013.2911035-3-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: qualcomm: eusb2-repeater: Rework init to drop redundant zero-out loopAbel Vesa
Instead of incrementing the base of the global reg fields, which renders the second instance of the repeater broken due to wrong offsets, use regmap with base and offset. As for zeroing out the rest of the tuning regs, avoid looping though the table and just use the table as is, as it is already zero initialized. Fixes: 99a517a582fc ("phy: qualcomm: phy-qcom-eusb2-repeater: Zero out untouched tuning regs") Tested-by: Elliot Berman <quic_eberman@quicinc.com> # sm8650-qrd Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240201-phy-qcom-eusb2-repeater-fixes-v4-1-cf18c8cef6d7@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: qcom: phy-qcom-m31: fix wrong pointer pass to PTR_ERR()Yang Yingliang
It should be 'qphy->vreg' passed to PTR_ERR() when devm_regulator_get() fails. Fixes: 08e49af50701 ("phy: qcom: Introduce M31 USB PHY driver") Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20230824091345.1072650-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: freescale: phy-fsl-imx8-mipi-dphy: Fix alias name to use dashesAlexander Stein
Devicetree spec lists only dashes as valid characters for alias names. Table 3.2: Valid characters for alias names, Devicee Specification, Release v0.4 Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Fixes: 3fbae284887de ("phy: freescale: phy-fsl-imx8-mipi-dphy: Add i.MX8qxp LVDS PHY mode support") Link: https://lore.kernel.org/r/20240110093343.468810-1-alexander.stein@ew.tq-group.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() APIManivannan Sadhasivam
Device drivers should just rely on the clocks provided by the devicetree and enable/disable them based on the requirement. There is no need to validate the clocks provided by devicetree in the driver. That's the job of DT schema. So let's switch to devm_clk_bulk_get_all() API that just gets the clocks provided by devicetree and remove hardcoded clocks info. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240131-ufs-phy-clock-v3-2-58a49d2f4605@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-04Merge 6.8-rc3 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-01-30phy: ti: phy-omap-usb2: Fix NULL pointer dereference for SRPTony Lindgren
If the external phy working together with phy-omap-usb2 does not implement send_srp(), we may still attempt to call it. This can happen on an idle Ethernet gadget triggering a wakeup for example: configfs-gadget.g1 gadget.0: ECM Suspend configfs-gadget.g1 gadget.0: Port suspended. Triggering wakeup ... Unable to handle kernel NULL pointer dereference at virtual address 00000000 when execute ... PC is at 0x0 LR is at musb_gadget_wakeup+0x1d4/0x254 [musb_hdrc] ... musb_gadget_wakeup [musb_hdrc] from usb_gadget_wakeup+0x1c/0x3c [udc_core] usb_gadget_wakeup [udc_core] from eth_start_xmit+0x3b0/0x3d4 [u_ether] eth_start_xmit [u_ether] from dev_hard_start_xmit+0x94/0x24c dev_hard_start_xmit from sch_direct_xmit+0x104/0x2e4 sch_direct_xmit from __dev_queue_xmit+0x334/0xd88 __dev_queue_xmit from arp_solicit+0xf0/0x268 arp_solicit from neigh_probe+0x54/0x7c neigh_probe from __neigh_event_send+0x22c/0x47c __neigh_event_send from neigh_resolve_output+0x14c/0x1c0 neigh_resolve_output from ip_finish_output2+0x1c8/0x628 ip_finish_output2 from ip_send_skb+0x40/0xd8 ip_send_skb from udp_send_skb+0x124/0x340 udp_send_skb from udp_sendmsg+0x780/0x984 udp_sendmsg from __sys_sendto+0xd8/0x158 __sys_sendto from ret_fast_syscall+0x0/0x58 Let's fix the issue by checking for send_srp() and set_vbus() before calling them. For USB peripheral only cases these both could be NULL. Fixes: 657b306a7bdf ("usb: phy: add a new driver for omap usb2 phy") Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20240128120556.8848-1-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: sgmii-eth: move PCS registers to separate headerDmitry Baryshkov
Follow the example of the rest of the QMP PHY drivers and move SGMII PCS registers to a separate header file. Cc: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-8-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: sgmii-eth: use existing register definitionsDmitry Baryshkov
The Qualcomm SGMII SerDes PHY is a QMP PHY. As such, it uses standard registers for QSERDES COM/RX/TX regions. Use register defines from the existing headers. Cc: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-7-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp-usbc: drop has_pwrdn_delay handlingDmitry Baryshkov
None of the PHYs supported by the USBC driver need power down delay. Drop corresponding flag and code. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-6-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp: move common bits definitions to common headerDmitry Baryshkov
Move bit definitions for the common headers to the common phy-qcom-qmp.h header. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-5-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp: split DP PHY registers to separate headersDmitry Baryshkov
Split the DP PHY register definitions to separate headers, removing them from the global one. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-4-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp: move common functions to common headerDmitry Baryshkov
Move common init tables code to the common header phy-qcom-qmp-common.h. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-3-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp-usb-legacy: drop qmp_usb_legacy_iomapDmitry Baryshkov
All PHYs supported by qmp-usb-legacy driver don't have issues with the PCS region. Replace qmp_usb_legacy_iomap() with devm_of_iomap(). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-2-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp-usb-legacy: drop single-lane supportDmitry Baryshkov
All PHYs supported by usb-legacy have two lanes. Drop support for single-lane configuration. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad DYbcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-1-a463d0b57836@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp-pcie: Update PCIe0 PHY settings for SM8550Qiang Yu
Align PCIe0 PHY settings with SM8550 latest PCIe PHY Hardware Programming Guide. Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Link: https://lore.kernel.org/r/1703742157-69840-3-git-send-email-quic_qianyu@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30phy: qcom: qmp-pcie: Update PCIe1 PHY settings for SM8550Can Guo
Align PCIe1 PHY settings with SM8550 latest PCIe PHY Hardware Programming Guide. Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Link: https://lore.kernel.org/r/1703742157-69840-2-git-send-email-quic_qianyu@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-27phy: realtek: usb: add new driver for the Realtek RTD SoC USB 3.0 PHYStanley Chang
Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 3.0 PHY transceivers. Note: New driver, remove the port status notification on legacy USB PHY. Use the generic PHY to notify the usb device connect and disconnect. To avoid using these PHYs would require describing the very same PHY using both the generic "phy" property and the deprecated "usb-phy" property. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20231213031203.4911-3-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-01-27phy: realtek: usb: add new driver for the Realtek RTD SoC USB 2.0 PHYStanley Chang
Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB controller. Added the driver to drive the USB 2.0 PHY transceivers. Note: New driver,remove the port status notification on legacy USB PHY. Use the generic PHY to notify the usb device connect and disconnect. To avoid using these PHYs would require describing the very same PHY using both the generic "phy" property and the deprecated "usb-phy" property. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20231213031203.4911-2-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-01-27phy: core: add notify_connect and notify_disconnect callbackStanley Chang
In Realtek SoC, the parameter of usb phy is designed to be able to do dynamic tuning based in the port status. Therefore, add a notify callback of phy driver when usb connection/disconnection change. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Link: https://lore.kernel.org/r/20231213031203.4911-1-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-01-24phy: lan966x: Add missing serdes mux entryHoratiu Vultur
According to the datasheet(Table 3-2: Port configuration) the serdes 2 (SD2) can be configured to run QSGMII or SGMII mode. Already the QSGMII mode is supported in the serdes_muxes list but was missing the SGMII mode. In this mode the serdes is connected to the port 4. Therefore add this entry in the list. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20240108205140.1701770-1-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: armada-38x: add mux value for gbe port 0 on serdes 0Josua Mayer
Armada 38x supports 3 functions on serdes #0: - pcie port 0 - sata port 0 - gbe port 0 Add missing entry for gbe port 0 on serdes 0 to the gbe_mux array. Because this array looks obscure to new readers, also add a comment explaining the meaning of rows, columns and values. Signed-off-by: Josua Mayer <josua@solid-run.com> Link: https://lore.kernel.org/r/20240106-fix-a38x-comphy-sd0-gbe0-v1-1-c7fd87272050@solid-run.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: renesas: rcar-gen3-usb2: Fix returning wrong error codeYoshihiro Shimoda
Even if device_create_file() returns error code, rcar_gen3_phy_usb2_probe() will return zero because the "ret" is variable shadowing. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Closes: https://lore.kernel.org/r/202312161021.gOLDl48K-lkp@intel.com/ Fixes: 441a681b8843 ("phy: rcar-gen3-usb2: fix implementation for runtime PM") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240105093703.3359949-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: qcom-qmp-pcie: Add support for X1E80100 g3x2 and g4x2 PCIEAbel Vesa
Add the X1E80100 G3 and G4 configurations. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231223-x1e80100-phy-pcie-v2-3-223c0556908a@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: qcom: qmp-pcie: Add QMP v6 registers layoutAbel Vesa
For consistency, add the QMP v6 registers layout even though they are the same as v5. Also switch all QMP v6 PHYs to use this new layout. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20231223-x1e80100-phy-pcie-v2-2-223c0556908a@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: qcom-qmp-usb: fix serdes init sequence for IPQ6018Mantas Pucka
Commit 23fd679249df ("phy: qcom-qmp: add USB3 PHY support for IPQ6018") noted that IPQ6018 init is identical to IPQ8074. Yet downstream uses separate serdes init sequence for IPQ6018. Since already existing IPQ9574 serdes init sequence is identical, just reuse it and fix failing USB3 mode in IPQ6018. Fixes: 23fd679249df ("phy: qcom-qmp: add USB3 PHY support for IPQ6018") Signed-off-by: Mantas Pucka <mantas@8devices.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1706026160-17520-3-git-send-email-mantas@8devices.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-24phy: qcom-qmp-usb: fix register offsets for ipq8074/ipq6018Mantas Pucka
Commit 2be22aae6b18 ("phy: qcom-qmp-usb: populate offsets configuration") introduced register offsets to the driver but for ipq8074/ipq6018 they do not match what was in the old style device tree. Example from old ipq6018.dtsi: <0x00078200 0x130>, /* Tx */ <0x00078400 0x200>, /* Rx */ <0x00078800 0x1f8>, /* PCS */ <0x00078600 0x044>; /* PCS misc */ which would translate to: {.., .pcs = 0x800, .pcs_misc = 0x600, .tx = 0x200, .rx = 0x400 } but was translated to: {.., .pcs = 0x600, .tx = 0x200, .rx = 0x400 } So split usb_offsets and fix USB initialization for IPQ8074 and IPQ6018. Tested only on IPQ6018 Fixes: 2be22aae6b18 ("phy: qcom-qmp-usb: populate offsets configuration") Signed-off-by: Mantas Pucka <mantas@8devices.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/1706026160-17520-2-git-send-email-mantas@8devices.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-usbc: enable SDM630 supportDmitry Baryshkov
Provide PHY configuration for the USB QMP PHY for the SDM630 / SDM660 platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240116-sdm660-usb3-support-v1-2-2fbd683aea77@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-usbc: handle CLAMP register in a correct wayDmitry Baryshkov
The QMP USB PHYs on msm8998, qcm2290 and some other platforms don't have the PCS_MISC_CLAMP_ENABLE register. Instead they need to toggle the register in the TCSR space. Make the new phy-qcom-qmp-usbc driver correctly handle the clamp register. Fixes: a51969fafc82 ("phy: qcom-qmp: Add QMP V3 USB3 PHY support for msm8998") Fixes: 8abe5e778b2c ("phy: qcom-qmp: Add QCM2290 USB3 PHY support") Cc: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240117-usbc-phy-vls-clamp-v2-3-a950c223f10f@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-usbc: add support for the Type-C handlingDmitry Baryshkov
The USB-C PHYs on the msm8998, QCM2290 and SM6115 platforms use special register to control which lanes of the Type-C port are used for the SuperSpeed USB connection. Mimic the qmp-combo driver and handle this register. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240113-pmi632-typec-v2-12-182d9aa0a5b3@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-usb: drop dual-lane handlingDmitry Baryshkov
Now as all dual-lane PHYs have been migrated to a new driver, drop support for dual lanes configuration. If the PHY uses two lanes for USB, it is symthom that it should use either a combo USB+DP or a USB-C PHY driver. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20240113-pmi632-typec-v2-11-182d9aa0a5b3@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-usb: split USB-C PHY driverDmitry Baryshkov
In preparation to adding Type-C handling for MSM8998, QCM2290 and SM6115 platforms, create new QMP USB-C PHY driver by splitting mentioned platforms to a separate file. In future it will also be extended with support for the DisplayPort handling. It will also be reused later for such platforms as SDM660, SM6125, SM6150. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240113-pmi632-typec-v2-10-182d9aa0a5b3@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550Can Guo
On SM8550, two sets of UFS PHY settings are provided, one set is to support HS-G5, another set is to support HS-G4 and lower gears. The two sets of PHY settings are programming different values to different registers, mixing the two sets and/or overwriting one set with another set is definitely not blessed by UFS PHY designers. To add HS-G5 support for SM8550, split the two sets of PHY settings into their dedicated overlay tables, only the common parts of the two sets of PHY settings are left in the .tbls. Consider we are going to add even higher gear support in future, to avoid adding more tables with different names, rename the .tbls_hs_g4 and make it an array, a size of 2 is enough as of now. In this case, .tbls alone is not a complete set of PHY settings, so either tbls_hs_overlay[0] or tbls_hs_overlay[1] must be applied on top of the .tbls to become a complete set of PHY settings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Can Guo <quic_cang@quicinc.com> Link: https://lore.kernel.org/r/1703557892-1822-1-git-send-email-quic_cang@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-23phy: qcom: qmp-ufs: Add SC7180 supportDavid Wronek
The SC7180 UFS PHY is identical to the one found on SM7150. Add a compatible for it. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: David Wronek <davidwronek@gmail.com> Link: https://lore.kernel.org/r/20240121-sm7125-upstream-v4-5-f7d1212c8ebb@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-18Merge tag 'phy-for-6.8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy Pull phy updates from Vinod Koul: "New Support: - Qualcomm SM8650 UFS, PCIe and USB/DP Combo PHY, eUSB2 PHY, SDX75 USB3, X1E80100 USB3 support - Mediatek MT8195 support - Rockchip RK3128 usb2 support - TI SGMII mode for J784S4 Updates: - Qualcomm v7 register offsets updates - Mediatek tphy support for force phy mode switch" * tag 'phy-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (34 commits) phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J784S4 phy: ti: gmii-sel: Enable SGMII mode for J784S4 phy: qcom-qmp-usb: Add Qualcomm X1E80100 USB3 PHY support dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add X1E80100 USB PHY binding phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document X1E80100 compatible dt-bindings: phy: qcom: snps-eusb2: Document the X1E80100 compatible phy: mediatek: tphy: add support force phy mode switch dt-bindings: phy: mediatek: tphy: add a property for force-mode switch phy: phy-can-transceiver: insert space after include phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: fix path to header phy: renesas: phy-rcar-gen2: use select for GENERIC_PHY phy: qcom-qmp: qserdes-txrx: Add v7 register offsets phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets phy: qcom-qmp: qserdes-com: Add v7 register offsets phy: qcom-qmp: pcs-usb: Add v7 register offsets phy: qcom-qmp: pcs: Add v7 register offsets phy: qcom-qmp: qserdes-txrx: Add some more v6.20 register offsets phy: qcom-qmp: qserdes-com: Add some more v6 register offsets ...
2024-01-12Merge tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drmLinus Torvalds
Pull drm updates from Dave Airlie: "This contains two major new drivers: - imagination is a first driver for Imagination Technologies devices, it only covers very specific devices, but there is hope to grow it - xe is a reboot of the i915 GPU (shares display) side using a more upstream focused development model, and trying to maximise code sharing. It's not enabled for any hw by default, and will hopefully get switched on for Intel's Lunarlake. This also drops a bunch of the old UMS ioctls. It's been dead long enough. amdgpu has a bunch of new color management code that is being used in the Steam Deck. amdgpu also has a new ACPI WBRF interaction to help avoid radio interference. Otherwise it's the usual lots of changes in lots of places. Detailed summary: new drivers: - imagination - new driver for Imagination Technologies GPU - xe - new driver for Intel GPUs using core drm concepts core: - add CLOSE_FB ioctl - remove old UMS ioctls - increase max objects to accomodate AMD color mgmt encoder: - create per-encoder debugfs directory edid: - split out drm_eld - SAD helpers - drop edid_firmware module parameter format-helper: - cache format conversion buffers sched: - move from kthread to workqueue - rename some internals - implement dynamic job-flow control gpuvm: - provide more features to handle GEM objects client: - don't acquire module reference displayport: - add mst path property documentation fdinfo: - alignment fix dma-buf: - add fence timestamp helper - add fence deadline support bridge: - transparent aux-bridge for DP/USB-C - lt8912b: add suspend/resume support and power regulator support panel: - edp: AUO B116XTN02, BOE NT116WHM-N21,836X2, NV116WHM-N49 - chromebook panel support - elida-kd35t133: rework pm - powkiddy RK2023 panel - himax-hx8394: drop prepare/unprepare and shutdown logic - BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G - Evervision VGG644804, SDC ATNA45AF01 - nv3052c: register docs, init sequence fixes, fascontek FS035VG158 - st7701: Anbernic RG-ARC support - r63353 panel controller - Ilitek ILI9805 panel controller - AUO G156HAN04.0 simplefb: - support memory regions - support power domains amdgpu: - add new 64-bit sequence number infrastructure - add AMD specific color management - ACPI WBRF support for RF interference handling - GPUVM updates - RAS updates - DCN 3.5 updates - Rework PCIe link speed handling - Document GPU reset types - DMUB fixes - eDP fixes - NBIO 7.9/7.11 updates - SubVP updates - XGMI PCIe state dumping for aqua vanjaram - GFX11 golden register updates - enable tunnelling on high pri compute amdkfd: - Migrate TLB flushing logic to amdgpu - Trap handler fixes - Fix restore workers handling on suspend/resume - Fix possible memory leak in pqm_uninit() - support import/export of dma-bufs using GEM handles radeon: - fix possible overflows in command buffer checking - check for errors in ring_lock i915: - reorg display code for reuse in xe driver - fdinfo memory stats printing - DP MST bandwidth mgmt improvements - DP panel replay enabling - MTL C20 phy state verification - MTL DP DSC fractional bpp support - Audio fastset support - use dma_fence interfaces instead of i915_sw_fence - Separate gem and display code - AUX register macro refactoring - Separate display module/device parameters - Move display capabilities debugfs under display - Makefile cleanups - Register cleanups - Move display lock inits under display/ - VLV/CHV DPIO PHY register and interface refactoring - DSI VBT sequence refactoring - C10/C20 PHY PLL hardware readout - DPLL code cleanups - Cleanup PXP plane protection checks - Improve display debug msgs - PSR selective fetch fixes/improvements - DP MST fixes - Xe2LPD FBC restrictions removed - DGFX uses direct VBT pin mapping - more MTL WAs - fix MTL eDP bug - eliminate use of kmap_atomic habanalabs: - sysfs entry to identify a device minor id with debugfs path - sysfs entry to expose device module id - add signed device info retrieval through INFO ioctl - add Gaudi2C device support - pcie reset prepare/done hooks msm: - Add support for SDM670, SM8650 - Handle the CFG interconnect to fix the obscure hangs / timeouts - Kconfig fix for QMP dependency - use managed allocators - DPU: SDM670, SM8650 support - DPU: Enable SmartDMA on SM8350 and SM8450 - DP: enable runtime PM support - GPU: add metadata UAPI - GPU: move devcoredumps to GPU device - GPU: convert to drm_exec ivpu: - update FW API - new debugfs file - a new NOP job submission test mode - improve suspend/resume - PM improvements - MMU PT optimizations - firmware profile frequency support - support for uncached buffers - switch to gem shmem helpers - replace kthread with threaded irqs rockchip: - rk3066_hdmi: convert to atomic - vop2: support nv20 and nv30 - rk3588 support mediatek: - use devm_platform_ioremap_resource - stop using iommu_present - MT8188 VDOSYS1 display support panfrost: - PM improvements - improve interrupt handling as poweroff qaic: - allow to run with single MSI - support host/device time sync - switch to persistent DRM devices exynos: - fix potential error pointer dereference - fix wrong error checking - add missing call to drm_atomic_helper_shutdown omapdrm: - dma-fence lockdep annotation fix tidss: - dma-fence lockdep annotation fix - support for AM62A7 v3d: - BCM2712 - rpi5 support - fdinfo + gputop support - uapi for CPU job handling virtio-gpu: - add context debug name" * tag 'drm-next-2024-01-10' of git://anongit.freedesktop.org/drm/drm: (2340 commits) drm/amd/display: Allow z8/z10 from driver drm/amd/display: fix bandwidth validation failure on DCN 2.1 drm/amdgpu: apply the RV2 system aperture fix to RN/CZN as well drm/amd/display: Move fixpt_from_s3132 to amdgpu_dm drm/amd/display: Fix recent checkpatch errors in amdgpu_dm Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole" drm/amd/display: avoid stringop-overflow warnings for dp_decide_lane_settings() drm/amd/display: Fix power_helpers.c codestyle drm/amd/display: Fix hdcp_log.h codestyle drm/amd/display: Fix hdcp2_execution.c codestyle drm/amd/display: Fix hdcp_psp.h codestyle drm/amd/display: Fix freesync.c codestyle drm/amd/display: Fix hdcp_psp.c codestyle drm/amd/display: Fix hdcp1_execution.c codestyle drm/amd/pm/smu7: fix a memleak in smu7_hwmgr_backend_init drm/amdkfd: Fix iterator used outside loop in 'kfd_add_peer_prop()' drm/amdgpu: Drop 'fence' check in 'to_amdgpu_amdkfd_fence()' drm/amdkfd: Confirm list is non-empty before utilizing list_first_entry in kfd_topology.c drm/amdgpu: Fix '*fw' from request_firmware() not released in 'amdgpu_ucode_request()' drm/amdgpu: Fix variable 'mca_funcs' dereferenced before NULL check in 'amdgpu_mca_smu_get_mca_entry()' ...
generated by cgit v1.2.3-70-g09d2 (git 2.47.1) at 2025-02-06 17:32:34 +0000