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2024-06-17pinctrl: rockchip: fix pinmux reset in rockchip_pmx_setHuang-Huang Bao
rockchip_pmx_set reset all pinmuxs in group to 0 in the case of error, add missing bank data retrieval in that code to avoid setting mux on unexpected pins. Fixes: 14797189b35e ("pinctrl: rockchip: add return value to rockchip_set_mux") Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Huang-Huang Bao <i@eh5.me> Link: https://lore.kernel.org/r/20240606125755.53778-5-i@eh5.me Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: rockchip: use dedicated pinctrl type for RK3328Huang-Huang Bao
rk3328_pin_ctrl uses type of RK3288 which has a hack in rockchip_pinctrl_suspend and rockchip_pinctrl_resume to restore GPIO6-C6 at assume, the hack is not applicable to RK3328 as GPIO6 is not even exist in it. So use a dedicated pinctrl type to skip this hack. Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Huang-Huang Bao <i@eh5.me> Link: https://lore.kernel.org/r/20240606125755.53778-4-i@eh5.me Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pinsHuang-Huang Bao
The pinmux bits for GPIO3-B1 to GPIO3-B6 pins are not explicitly specified in RK3328 TRM, however we can get hint from pad name and its correspinding IOMUX setting for pins in interface descriptions. The correspinding IOMIX settings for these pins can be found in the same row next to occurrences of following pad names in RK3328 TRM. GPIO3-B1: IO_TSPd5m0_CIFdata5m0_GPIO3B1vccio6 GPIO3-B2: IO_TSPd6m0_CIFdata6m0_GPIO3B2vccio6 GPIO3-B3: IO_TSPd7m0_CIFdata7m0_GPIO3B3vccio6 GPIO3-B4: IO_CARDclkm0_GPIO3B4vccio6 GPIO3-B5: IO_CARDrstm0_GPIO3B5vccio6 GPIO3-B6: IO_CARDdetm0_GPIO3B6vccio6 Add pinmux data to rk3328_mux_recalced_data as mux register offset for these pins does not follow rockchip convention. Signed-off-by: Huang-Huang Bao <i@eh5.me> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Link: https://lore.kernel.org/r/20240606125755.53778-3-i@eh5.me Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pinsHuang-Huang Bao
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width, correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is recalculated so it remain unchanged. The pinmux bits for those pins are not explicitly specified in RK3328 TRM, however we can get hint from pad name and its correspinding IOMUX setting for pins in interface descriptions. The correspinding IOMIX settings for GPIO2-B0 to GPIO2-B6 can be found in the same row next to occurrences of following pad names in RK3328 TRM. GPIO2-B0: IO_SPIclkm0_GPIO2B0vccio5 GPIO2-B1: IO_SPItxdm0_GPIO2B1vccio5 GPIO2-B2: IO_SPIrxdm0_GPIO2B2vccio5 GPIO2-B3: IO_SPIcsn0m0_GPIO2B3vccio5 GPIO2-B4: IO_SPIcsn1m0_FLASHvol_sel_GPIO2B4vccio5 GPIO2-B5: IO_ I2C2sda_TSADCshut_GPIO2B5vccio5 GPIO2-B6: IO_ I2C2scl_GPIO2B6vccio5 This fix has been tested on NanoPi R2S for fixing confliting pinmux bits between GPIO2-B7 with GPIO2-B5. Signed-off-by: Huang-Huang Bao <i@eh5.me> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Fixes: 3818e4a7678e ("pinctrl: rockchip: Add rk3328 pinctrl support") Link: https://lore.kernel.org/r/20240606125755.53778-2-i@eh5.me Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: fix deadlock in create_pinctrl() when handling -EPROBE_DEFERHagar Hemdan
In create_pinctrl(), pinctrl_maps_mutex is acquired before calling add_setting(). If add_setting() returns -EPROBE_DEFER, create_pinctrl() calls pinctrl_free(). However, pinctrl_free() attempts to acquire pinctrl_maps_mutex, which is already held by create_pinctrl(), leading to a potential deadlock. This patch resolves the issue by releasing pinctrl_maps_mutex before calling pinctrl_free(), preventing the deadlock. This bug was discovered and resolved using Coverity Static Analysis Security Testing (SAST) by Synopsys, Inc. Fixes: 42fed7ba44e4 ("pinctrl: move subsystem mutex to pinctrl_dev struct") Suggested-by: Maximilian Heyne <mheyne@amazon.de> Signed-off-by: Hagar Hemdan <hagarhem@amazon.com> Link: https://lore.kernel.org/r/20240604085838.3344-1-hagarhem@amazon.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: bcm2835: Fix permissions of persist_gpio_outputsStefan Wahren
The commit 8ff05989b44e ("pinctrl: bcm2835: Make pin freeing behavior configurable") unintentionally made the module parameter persist_gpio_outputs changeable at runtime. So drop the write permission in order to make the freeing behavior predictable for user applications. Fixes: 8ff05989b44e ("pinctrl: bcm2835: Make pin freeing behavior configurable") Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com> Closes: https://lore.kernel.org/linux-gpio/Zjk-C0nLmlynqLAE@surfacebook.localdomain/ Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20240603181938.76047-2-wahrenst@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: tps6594: add missing support for LP8764 PMICThomas Richard
Add missing support for LP8764 PMIC in the probe(). Issue detected with v6.10-rc1 (and reproduced with 6.10-rc2) using a TI J7200 EVM board. tps6594-pinctrl tps6594-pinctrl.8.auto: error -EINVAL: Couldn't register gpio_regmap driver tps6594-pinctrl tps6594-pinctrl.8.auto: probe with driver tps6594-pinctrl failed with error -22 Fixes: 208829715917 (pinctrl: pinctrl-tps6594: Add TPS65224 PMIC pinctrl and GPIO) Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://lore.kernel.org/r/20240603082110.2104977-1-thomas.richard@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: qcom: spmi-gpio: drop broken pm8008 supportJohan Hovold
The SPMI GPIO driver assumes that the parent device is an SPMI device and accesses random data when backcasting the parent struct device pointer for non-SPMI devices. Fortunately this does not seem to cause any issues currently when the parent device is an I2C client like the PM8008, but this could change if the structures are reorganised (e.g. using structure randomisation). Notably the interrupt implementation is also broken for non-SPMI devices. Also note that the two GPIO pins on PM8008 are used for interrupts and reset so their practical use should be limited. Drop the broken GPIO support for PM8008 for now. Fixes: ea119e5a482a ("pinctrl: qcom-pmic-gpio: Add support for pm8008") Cc: stable@vger.kernel.org # 5.13 Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20240529162958.18081-9-johan+linaro@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-05-27pinctrl: renesas: rzg2l: Use spin_{lock,unlock}_irq{save,restore}Claudiu Beznea
On PREEMPT_RT kernels the spinlock_t maps to an rtmutex. Using raw_spin_lock_irqsave()/raw_spin_unlock_irqrestore() on &pctrl->lock.rlock breaks the PREEMPT_RT builds. To fix this use spin_lock_irqsave()/spin_unlock_irqrestore() on &pctrl->lock. Fixes: 02cd2d3be1c3 ("pinctrl: renesas: rzg2l: Configure the interrupt type on resume") Reported-by: Diederik de Haas <didi.debian@cknow.org> Closes: https://lore.kernel.org/all/131999629.KQPSlr0Zke@bagend Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240522055421.2842689-1-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-05-22Merge tag 'mfd-next-6.10' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Device Support: - Add support for X-Powers AXP717 PMIC to AXP22X - Add support for Rockchip RK816 PMIC to RK8XX - Add support for TI TPS65224 PMIC to TPS6594 New Functionality: - Add Power Off functionality to Rohm BD71828 - Allow I2C SMBus access in Renesas RSMU Fix-ups: - Device Tree binding adaptions/conversions/creation - Shift Intel support over to MSI interrupts - Generify adding platform data away from being ACPI specific - Use device core supplied attribute to register sysfs entries - Replace hand-rolled functionality with generic APIs - Utilise centrally provided helpers and macros - Clean-up error handling - Remove superfluous/duplicated/unused sections - Trivial; spelling, whitespace, coding-style adaptions - More Maple Tree conversions" * tag 'mfd-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (44 commits) dt-bindings: mfd: Use full path to other schemas mfd: rsmu: support I2C SMBus access dt-bindings: mfd: Convert lp873x.txt to json-schema dt-bindings: mfd: aspeed: Drop 'oneOf' for pinctrl node dt-bindings: mfd: allwinner,sun6i-a31-prcm: Use hyphens in node names mfd: ssbi: Remove unused field 'slave' from 'struct ssbi' mfd: kempld: Remove custom DMI matching code mfd: cs42l43: Update patching revision check dt-bindings: mfd: qcom: pm8xxx: Add pm8901 compatible mfd: timberdale: Remove redundant assignment to variable err dt-bindings: mfd: qcom,spmi-pmic: Add pbs to SPMI device types dt-bindings: mfd: syscon: Add ti,am62p-cpsw-mac-efuse compatible dt-bindings: mfd: qcom,tcsr: Add compatible for SDX75 mfd: axp20x: Convert to use Maple Tree register cache mfd: bd71828: Remove commented code lines mfd: intel-m10-bmc: Change staging size to a variable dt-bindings: mfd: Add ROHM BD71879 mfd: Tidy Kconfig dependency's parentheses mfd: ocelot-spi: Use spi_sync_transfer() dt-bindings: mfd: syscon: Add missing simple syscon compatibles ...
2024-05-20Merge tag 'pinctrl-v6.10-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries New drivers: - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support Improvements: - Serious cleanup of the recently merged aw9523 driver - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single - A slew of device tree binding cleanups - Support a bus clock in the Samsung driver" * tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: bcm2835: Make pin freeing behavior configurable dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108 pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function dt-bindings: pinctrl: mediatek: mt7622: fix array properties pinctrl: samsung: drop redundant drvdata assignment pinctrl: samsung: support a bus clock dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779h0: Fix IRQ suffixes pinctrl: renesas: rzg2l: Remove extra space in function parameter dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901 pinctrl: pinconf-generic: print hex value pinctrl: realtek: fix module autoloading pinctrl: qcom: sm7150: fix module autoloading pinctrl: loongson2: fix module autoloading pinctrl: mediatek: fix module autoloading pinctrl: freescale: imx8ulp: fix module autoloading dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes ...
2024-05-14Merge tag 'gpio-updates-for-v6.10-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski "This was a quiet release cycle for the GPIO tree and so this pull-request is relatively small. We have one new driver, some minor improvements to the GPIO core code and across several drivers, some DT and documentation updates but in general nothing stands out or is controversial. All changes have spent time in next with no reported issues (or ones that were quickly fixed). GPIO core: - remove more unused legacy interfaces (after converting the last remaining users to better alternatives) - update kerneldocs - improve error handling and log messages in GPIO ACPI code - remove dead code (always true checks) from GPIOLIB New drivers: - add a driver for Intel Granite Rapids-D vGPIO Driver improvements: - use -ENOTSUPP consistently in gpio-regmap and gpio-pcie-idio-24 - provide an ID table for gpio-cros-ec to avoid a driver name fallback check - add support for gpio-ranges for GPIO drivers supporting multiple GPIO banks - switch to using dynamic GPIO base in gpio-brcmstb - fix irq handling in gpio-npcm-sgpio - switch to memory mapped IO accessors in gpio-sch DT bindings: - add support for gpio-ranges to gpio-brcmstb - add support for a new model and the gpio-line-names property to gpio-mpfs Documentation: - replace leading tabs with spaces in code blocks - fix typos" * tag 'gpio-updates-for-v6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (30 commits) gpio: nuvoton: Fix sgpio irq handle error gpiolib: Discourage to use formatting strings in line names gpio: brcmstb: add support for gpio-ranges gpio: of: support gpio-ranges for multiple gpiochip devices dt-bindings: gpio: brcmstb: add gpio-ranges gpio: Add Intel Granite Rapids-D vGPIO driver gpio: brcmstb: Use dynamic GPIO base numbers gpiolib: acpi: Set label for IRQ only lines gpiolib: acpi: Add fwnode name to the GPIO interrupt label gpiolib: Get rid of never false gpio_is_valid() calls gpiolib: acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by() gpiolib: acpi: Move acpi_can_fallback_to_crs() out of __acpi_find_gpio() gpiolib: acpi: Simplify error handling in __acpi_find_gpio() gpiolib: acpi: Extract __acpi_find_gpio() helper gpio: sch: Utilise temporary variable for struct device gpio: sch: Switch to memory mapped IO accessors gpio: regmap: Use -ENOTSUPP consistently gpio: pcie-idio-24: Use -ENOTSUPP consistently Documentation: gpio: Replace leading TABs by spaces in code blocks gpiolib: acpi: Check for errors first in acpi_find_gpio() ...
2024-05-13Merge tag 'soc-drivers-6.10' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "As usual, these are updates for drivers that are specific to certain SoCs or firmware running on them. Notable updates include - The new STMicroelectronics STM32 "firewall" bus driver that is used to provide a barrier between different parts of an SoC - Lots of updates for the Qualcomm platform drivers, in particular SCM, which gets a rewrite of its initialization code - Firmware driver updates for Arm FF-A notification interrupts and indirect messaging, SCMI firmware support for pin control and vendor specific interfaces, and TEE firmware interface changes across multiple TEE drivers - A larger cleanup of the Mediatek CMDQ driver and some related bits - Kconfig changes for riscv drivers to prepare for adding Kanaan k230 support - Multiple minor updates for the TI sysc bus driver, memory controllers, hisilicon hccs and more" * tag 'soc-drivers-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (103 commits) firmware: qcom: uefisecapp: Allow on sc8180x Primus and Flex 5G soc: qcom: pmic_glink: Make client-lock non-sleeping dt-bindings: soc: qcom,wcnss: fix bluetooth address example soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234 bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall() bus: etzpc: introduce ETZPC firewall controller driver firmware: arm_ffa: Avoid queuing work when running on the worker queue bus: ti-sysc: Drop legacy idle quirk handling bus: ti-sysc: Drop legacy quirk handling for smartreflex bus: ti-sysc: Drop legacy quirk handling for uarts bus: ti-sysc: Add a description and copyrights bus: ti-sysc: Move check for no-reset-on-init soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute firmware: arm_ffa: Fix memory corruption in ffa_msg_send2() bus: rifsc: introduce RIFSC firewall controller driver of: property: fw_devlink: Add support for "access-controller" soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200 soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS ...
2024-05-10Merge branches 'ib-mfd-misc-pinctrl-regulator-6.10', ↵Lee Jones
'ib-mfd-pinctrl-regulator-6.10' and 'ib-mfd-regulator-6.10' into ibs-for-mfd-merged
2024-05-07Merge tag 'riscv-config-for-v6.10' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC Kconfig Updates for v6.10 A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: config: enable ARCH_CANAAN in defconfig RISC-V: drop SOC_VIRT for ARCH_VIRT RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP RISC-V: Drop unused SOC_CANAAN reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210 riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210 Link: https://lore.kernel.org/r/20240503-mardi-underling-3d81a9f97329@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-05-07Merge tag 'intel-gpio-v6.10-1' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next intel-gpio for v6.10-1 * New driver for vGPIO controller on Intel Granite Rapids-D * Update ACPI GPIO library to unify the IRQ code path * Better GPIO IRQ line labeling for ACPI * Switched Intel SCH driver to use "mapped" I/O accessors The following is an automated git shortlog grouped by driver: Add Intel Granite Rapids-D vGPIO driver: - Add Intel Granite Rapids-D vGPIO driver crystalcove: - Use -ENOTSUPP consistently gpiolib: - acpi: Set label for IRQ only lines - acpi: Add fwnode name to the GPIO interrupt label - acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by() - acpi: Move acpi_can_fallback_to_crs() out of __acpi_find_gpio() - acpi: Simplify error handling in __acpi_find_gpio() - acpi: Extract __acpi_find_gpio() helper - acpi: Check for errors first in acpi_find_gpio() - acpi: Remove never true check in acpi_get_gpiod_by_index() sch: - Utilise temporary variable for struct device - Switch to memory mapped IO accessors wcove: - Use -ENOTSUPP consistently
2024-05-06Merge tag 'samsung-pinctrl-6.10' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.10 1. Add support for toggling bus clock (PCLK) for any pin controller register accesses. This looks needed on newer Samsung chips, like Google GS101 and probably Exynos850. 2. Drop old, deprecated in v6.1 bindings header with register constants. The constants were moved to DTS headers. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-05-06pinctrl: bcm2835: Make pin freeing behavior configurableStefan Wahren
Until now after a bcm2835 pin was freed its pinmux was set to GPIO_IN. So in case it was configured as GPIO_OUT before the configured output level also get lost. As long as GPIO sysfs was used this wasn't actually a problem because the pins and their possible output level were kept by sysfs. Since more and more Raspberry Pi users start using libgpiod they are confused about this behavior. So make the pin freeing behavior of GPIO_OUT configurable via module parameter. In case pinctrl-bcm2835.persist_gpio_outputs is set to 1, the output level is kept. This patch based on the downstream work of Phil Elwell. Link: https://github.com/raspberrypi/linux/pull/6117 Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Message-ID: <20240503062745.11298-1-wahrenst@gmx.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-05-03pinctrl: pinctrl-tps6594: Add TPS65224 PMIC pinctrl and GPIONirmala Devi Mal Nadar
Add support for TPS65224 pinctrl and GPIOs to TPS6594 driver as they have significant functional overlap. TPS65224 PMIC has 6 GPIOS which can be configured as GPIO or other dedicated device functions. Signed-off-by: Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com> Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/0109018f2fdce15d-c13bd809-a11b-4202-9b7f-c9380d51b070-000000@ap-south-1.amazonses.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-05-03pinctrl: rk805: Add rk816 pinctrl supportAlex Bee
This adds support for RK816 to the exising rk805 pinctrl driver It has a single pin which can be configured as input from a thermistor (for instance in an attached battery) or as a gpio. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240416161237.2500037-4-knaerzche@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-05-03pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regsDanila Tikhonov
SDC1 and UFS_RESET special pins are located in the west memory bank. SDC1 have address 0x359a000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9a000 (SDC1_OFFSET) = 0x359a000 UFS_RESET have address 0x359f000: 0x3500000 (TLMM BASE) + 0x0 (WEST) + 0x9f000 (UFS_OFFSET) = 0x359a000 Fixes: b915395c9e04 ("pinctrl: qcom: Add SM7150 pinctrl driver") Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Message-ID: <20240423203245.188480-1-danila@jiaxyga.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-30Merge tag 'pinctrl-v6.9-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: - Fix a double-free in the pinctrl_enable() errorpath - Fix a refcount leak in pinctrl_dt_to_map() - Fix selecting the GPIO pin control state and the UART3 pin config group in the Intel Baytrail driver - Fix readback of schmitt trigger status in the Mediatek Paris driver, along with some semantic pin config issues in this driver - Fix a pin suffix typo in the Meson A1 driver - Fix an erroneous register offset in he Aspeed G6 driver - Fix an inconsistent lock state and the interrupt type on resume in the Renesas RZG2L driver - Fix some minor confusion in the Renesas DT bindings * tag 'pinctrl-v6.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: renesas: rzg2l: Configure the interrupt type on resume pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map() pinctrl: baytrail: Add pinconf group for uart3 pinctrl: baytrail: Fix selecting gpio pinctrl state pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLE pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readback pinctrl: core: delete incorrect free in pinctrl_enable() pinctrl/meson: fix typo in PDM's pin name pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T pinctrl: renesas: rzg2l: Execute atomically the interrupt configuration dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow 'input' and 'output-enable' properties
2024-04-30pinctrl: samsung: drop redundant drvdata assignmentKrzysztof Kozlowski
Fix W=1 warning: drivers/pinctrl/samsung/pinctrl-samsung.c: In function ‘samsung_gpio_set_direction’: drivers/pinctrl/samsung/pinctrl-samsung.c:633:42: warning: variable ‘drvdata’ set but not used [-Wunused-but-set-variable] Fixes: f9c744747973 ("pinctrl: samsung: support a bus clock") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404300825.6lxLwvUY-lkp@intel.com/ Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240430060304.12332-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-29Merge tag 'scmi-updates-6.10' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers Arm SCMI updates for v6.10 1. Basic support for SCMI v3.2 pincontrol protocol SCMI v3.2 introduces pincontrol protocol which is intended for controlling pins and their configuration. The pin control protocol provides commands to: - List the pins, groups of pins, available functions, and their association with each other. - Set the parameter configuration and multiplexing of the pins or groups of pins - Optionally request exclusive access to a pin or group of pins. - Optionally configure the permissions of an agent to access a pin or group of pins. These changes adds basic support for the same in the SCMI core layer and an implementation of the generic scmi-pinctrl driver with associated DT bindings. 2. Framework support for multiple vendors custom protocols With the fixed space for vendor protocols, the possibility of having multiple vendors implementing distinct SCMI vendor protocols with the same overlapping protocol number is very high and with the need to support them all in a single kernel image or a module is also high. In order to implement the same we assume: - vendor protocols has to be tagged at build time with a vendor_id - vendor protocols could also optionally be tagged at build time with sub_vendor_id and implementation version At the initialisation all the built vendor protocols are registered with the SCMI core using a key derived from the above tags 3. Logging and tracing improvements This includes using dev_err_probe() to bail out from probe, adding message dump traces for bad and unexpected replies and widening of the tag buffer in trace_scmi_dump_msg to allow diverse tag names 4. Miscellaneous updates or improvements This includes adding the accessor function get_max_msg_size() used in pinctl protocol, updation of dt-bindings examples for protocol@13 to promote new bindings and simplification of scmi_devm_notifier_unregister * tag 'scmi-updates-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: pinctrl: Implementation of the generic scmi-pinctrl driver firmware: arm_scmi: Add basic support for SCMI v3.2 pincontrol protocol dt-bindings: firmware: Support SCMI pinctrl protocol firmware: arm_scmi: Introduce get_max_msg_size() helper/accessor firmware: arm_scmi: Add support for multiple vendors custom protocols dt-bindings: firmware: arm,scmi: Update examples for protocol@13 firmware: arm_scmi: Avoid non-constant printk format strings firmware: arm_scmi: Use dev_err_probe to bail out firmware: arm_scmi: Simplify scmi_devm_notifier_unregister firmware: arm_scmi: Add message dump traces for bad and unexpected replies firmware: arm_scmi: Add helper to trace bad messages include: trace: Widen the tag buffer in trace_scmi_dump_msg firmware: arm_scmi: Log the perf domain names in the error paths Link: https://lore.kernel.org/r/20240426105031.1526987-1-sudeep.holla@arm.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29pinctrl: samsung: support a bus clockAndré Draszik
On some Samsung-based SoCs there are separate bus clocks / gates each for each pinctrl instance. To be able to access each pinctrl instance's registers, this bus clock needs to be running, otherwise register access will hang. Google Tensor gs101 is one example for such an implementation. Update the driver to handle this optional bus clock: * handle an optional bus clock from DT * prepare it during driver probe * enclose all relevant register accesses with a clock enable & disable Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240426-samsung-pinctrl-busclock-v3-2-adb8664b8a7e@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-29Merge tag 'renesas-pinctrl-for-v6.10-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.10 - Add external interrupt pin groups on R-Car V4M, - Miscellaneous fixes and improvements. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-25Merge tag 'intel-pinctrl-v6.9-1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v6.9-1 * Correct GPIO selection and add UART3 pins for Intel Bay Trail The following is an automated git shortlog grouped by driver: baytrail: - Add pinconf group for uart3 - Fix selecting gpio pinctrl state Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-25Merge tag 'renesas-pinctrl-fixes-for-v6.9-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes pinctrl: renesas: Fixes for v6.9 (take two) - Fix interrupt configuration on RZ/G2L after s2ram. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-25pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfacesPaul Barker
The RZ/G3S SoC supports configurable supply voltages for several of its I/O interfaces. All of these interfaces support both 1.8V and 3.3V supplies, but only the Ethernet and XSPI interfaces support a 2.5V supply. Voltage selection for the XSPI interface is not yet supported, so this leaves only the Ethernet interfaces currently supporting selection of a 2.5V supply. So we need to return an error if there is an attempt to select a 2.5V supply for any non-Ethernet interface. Fixes: 51996952b8b5 ("pinctrl: renesas: rzg2l: Add support to select power source for Ethernet pins") Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240417114132.6605-1-paul.barker.ct@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-04-23pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and functionGeert Uytterhoeven
Add pins, groups, and function for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/258d03b27b77f60cc03fc3257bb4c6715b612a61.1713282028.git.geert+renesas@glider.be
2024-04-23pinctrl: renesas: r8a779h0: Fix IRQ suffixesGeert Uytterhoeven
The suffixes of the IRQ identifiers, as used for pins related to the Interrupt Controller for External Devices (INTC-EX), are inconsistent. Correct them to match the Pin Multiplex attachment in Rev.0.51 of the R-Car V4M Series Hardware User's Manual. Fixes: 291f7856fc451cbe ("pinctrl: renesas: Initial R8A779H0 (R-Car V4M) PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/7d3c7498d9e8eda5583b15f9163eb25bb797ed24.1713282028.git.geert+renesas@glider.be
2024-04-23pinctrl: renesas: rzg2l: Remove extra space in function parameterLad Prabhakar
Remove unnecessary space in rzg2l_pinctrl_pm_setup_pfc() function parameter. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240226192530.141945-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-04-22pinctrl: renesas: rzg2l: Configure the interrupt type on resumeClaudiu Beznea
Commit dce0919c83c3 ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") removed the setup of TINT from rzg2l_irqc_irq_enable(). To address the spurious interrupt issue the setup of TINT has been moved in rzg2l_tint_set_edge() through rzg2l_disable_tint_and_set_tint_source(). With this, the interrupts are not properly re-configured after a suspend-to-RAM cycle. To address this issue and avoid spurious interrupts while resumming set the interrupt type before enabling it. Fixes: dce0919c83c3 ("irqchip/renesas-rzg2l: Do not set TIEN and TINT source at the same time") Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240419063822.3467424-1-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-04-19pinctrl: Implementation of the generic scmi-pinctrl driverPeng Fan
scmi-pinctrl driver implements pinctrl driver interface and using SCMI protocol to redirect messages from pinctrl subsystem SDK to SCMI platform firmware, which does the changes in HW. Co-developed-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Signed-off-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20240418-pinctrl-scmi-v11-4-499dca9864a7@nxp.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2024-04-17pinctrl: pinconf-generic: print hex valuePeng Fan
Hex value will be easier to match hardware register bits layout, so same as pinconf_generic_dump_config, print hex value. Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-ID: <20240412005128.2937486-1-peng.fan@oss.nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17Merge tag 'renesas-pinctrl-fixes-for-v6.9-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into fixes pinctrl: renesas: Fixes for v6.9 - Fix a dtbs_check warning on RZ/G3S, - Fix a lockdep warning on RZ/G2L. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17pinctrl: realtek: fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-5-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17pinctrl: qcom: sm7150: fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Bjorn Andersson <quic_bjorande@quicinc.com> Message-ID: <20240411064614.7409-4-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17pinctrl: loongson2: fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-3-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17pinctrl: mediatek: fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240411064614.7409-2-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-17pinctrl: freescale: imx8ulp: fix module autoloadingKrzysztof Kozlowski
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Message-ID: <20240411064614.7409-1-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-16pinctrl: devicetree: fix refcount leak in pinctrl_dt_to_map()Zeng Heng
If we fail to allocate propname buffer, we need to drop the reference count we just took. Because the pinctrl_dt_free_maps() includes the droping operation, here we call it directly. Fixes: 91d5c5060ee2 ("pinctrl: devicetree: fix null pointer dereferencing in pinctrl_dt_to_map") Suggested-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Zeng Heng <zengheng4@huawei.com> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Message-ID: <20240415105328.3651441-1-zengheng4@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-15gpiolib: acpi: Pass con_id instead of property into acpi_dev_gpio_irq_get_by()Andy Shevchenko
Pass the con_id instead of property so that callers won't repeat the GPIO suffixes to try. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2024-04-08pinctrl: baytrail: Add pinconf group for uart3Hans de Goede
GPIO_S0_SC57 / GPIO_S0_SC61 can be muxed to PCU_UART_TXD / PCU_UART_RXD, add a pinconf group for this. On Bay Trail board schematics using these pins as UART these are called UART3_TXD / UART3_RXD, name the pinconf group "uart3_grp" to be consistent with the schematics. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2024-04-08pinctrl: baytrail: Fix selecting gpio pinctrl stateHans de Goede
For all the "score" pin-groups all the intel_pingroup-s to select the non GPIO function are re-used for byt_score_gpio_groups[]. But this is incorrect since a pin-group includes the mode setting, which for the non GPIO functions generally is 1, where as to select the GPIO function mode must be set to 0. So the GPIO function needs separate intel_pingroup-s with their own mode value of 0. Add a new PIN_GROUP_GPIO macro which adds a foo_gpio entry to each pin-group defined this way and update byt_score_gpio_groups[] to point to the new foo_gpio entries. The "sus" usb_oc_grp usb_ulpi_grp and pcu_spi_grp pin-groups are special because these have a non 0 mode value to select the GPIO functions and these already have matching foo_gpio pin-groups, leave these are unchanged. The pmu_clk "sus" groups added in commit 2f46d7f7e959 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk") do need to use the new PIN_GROUP_GPIO macro. Fixes: 2f46d7f7e959 ("pinctrl: baytrail: Add pinconf group + function for the pmu_clk") Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2024-04-08pinctrl: Use DEFINE_SHOW_STORE_ATTRIBUTE() helper for debugfsAndy Shevchenko
Use DEFINE_SHOW_STORE_ATTRIBUTE() helper for read-write file to reduce some duplicated code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-ID: <20240404193521.3581399-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-05pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210Yangyu Chen
Since SOC_FOO should be deprecated from patch [1], and cleanup for other SoCs is already in the mailing list [2,3,4], we remove the use of SOC_CANAAN and introduced SOC_CANAAN_K210 for K210-specific drivers, Thus, we replace its drivers depends on SOC_CANAAN_K210 and default select when it has the symbol SOC_CANAAN_K210. [1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/ [2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ [3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/ [4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/ Signed-off-by: Yangyu Chen <cyy@cyyself.name> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-04-04pinctrl: single: Fix PIN_CONFIG_BIAS_DISABLE handlingMatthijs Kooijman
The pinctrl-single driver handles pin_config_set by looking up the requested setting in a DT-defined lookup table, which defines what bits correspond to each setting. There is no way to add PIN_CONFIG_BIAS_DISABLE entries to the table, since there is instead code to disable the bias by applying the disable values of both the pullup and pulldown entries in the table. However, this code is inside the table-lookup loop, so it would only execute if there is an entry for PIN_CONFIG_BIAS_DISABLE in the table, which can never exist, so this code never runs. This commit lifts the offending code out of the loop, so it just executes directly whenever PIN_CONFIG_BIAS_DISABLE is requested, skippipng the table lookup loop. This also introduces a new `param` variable to make the code slightly more readable. This bug seems to have existed when this code was first merged in commit 9dddb4df90d13 ("pinctrl: single: support generic pinconf"). Earlier versions of this patch did have an entry for PIN_CONFIG_BIAS_DISABLE in the lookup table, but that was removed, which is probably how this bug was introduced. Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl> Reviewed-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Tony Lindgren <tony@atomide.com> Message-ID: <20240319110633.230329-1-matthijs@stdin.nl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04pinctrl: pinctrl-single: Remove some unused fields in struct pcs_functionChristophe JAILLET
In "struct pcs_function", the 'pgnames' and 'npgnames' fields are unused. This is a left-over from commit 571aec4df5b7 ("pinctrl: single: Use generic pinmux helpers for managing functions"); Remove them. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <a6b653642298d35b1e3656e9bfc6d1b322fbbe68.1712004518.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04pinctrl: max77620: Remove an unused fields in struct max77620_pin_info and ↵Christophe JAILLET
max77620_pctrl_info In "struct max77620_pin_info", the 'pull_config' field is unused. In "struct max77620_pctrl_info", the 'pins_current_opt' field is unused. Remove them. On my x86_64 config, with allmodconfig, this shrinks the struct max77620_pctrl_info from 360 bytes to 296. Found with cppcheck, unusedStructMember. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Message-ID: <60af8968864ae4a83a76e589b39a2b1e1f65c9db.1711992588.git.christophe.jaillet@wanadoo.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3-70-g09d2 (git 2.47.1) at 2024-12-26 02:41:03 +0000