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path: root/drivers/platform/chrome/cros_ec_lpc.c
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2023-10-28platform/chrome: cros_ec_lpc: Separate host command and irq disableLalith Rajendran
Both cros host command and irq disable were moved to suspend prepare stage from late suspend recently. This is causing EC to report MKBP event timeouts during suspend stress testing. When the MKBP event timeouts happen during suspend, subsequent wakeup of AP by EC using MKBP doesn't happen properly. Move the irq disabling part back to late suspend stage which is a general suggestion from the suspend kernel documentaiton to do irq disable as late as possible. Fixes: 4b9abbc132b8 ("platform/chrome: cros_ec_lpc: Move host command to prepare/complete") Signed-off-by: Lalith Rajendran <lalithkraj@chromium.org> Link: https://lore.kernel.org/r/20231027160221.v4.1.I1725c3ed27eb7cd9836904e49e8bfa9fb0200a97@changeid Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2023-09-28platform/chrome: cros_ec_lpc: Convert to platform remove callback returning voidUwe Kleine-König
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230927081040.2198742-5-u.kleine-koenig@pengutronix.de Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2023-08-07platform/chrome: cros_ec_lpc: Remove EC panic shutdown timeoutRob Barnes
Remove the 1 second timeout applied to hw_protection_shutdown after an EC panic. On some platforms this 1 second timeout is insufficient to allow the filesystem to fully sync. Independently the EC will force a full system reset after a short period. So this backup timeout is unnecessary. Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20230802175847.1.Ie9fc53b6a1f4c6661c5376286a50e0cf51b3e961@changeid Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2023-05-22platform/chrome: cros_ec_lpc: Move host command to prepare/completeTim Van Patten
Update cros_ec_lpc_pm_ops to call cros_ec_lpc_prepare() during PM .prepare() and cros_ec_lpc_complete() during .complete(). This moves the host command that the AP sends and allows the EC to log entry/exit of AP's suspend/resume more accurately. Reviewed-by: Raul E Rangel <rrangel@chromium.org> Signed-off-by: Tim Van Patten <timvp@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20230515142552.1.I17cae37888be3a8683911991602f18e482e7a621@changeid
2023-05-15platform/chrome: cros_ec: Report EC panic as ueventRob Barnes
Create a uevent when an EC panic is detected. This will allow udev rules to trigger when a panic occurs. For example, a udev rule could be added to capture an EC coredump. This approach avoids the need to stuff all the processing into the driver. Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Prashant Malani <pmalani@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20230509232624.3120347-1-robbarnes@google.com
2023-01-11platform/chrome: cros_ec_lpc: initialize the buf variableTom Rix
Clang static analysis reports this problem drivers/platform/chrome/cros_ec_lpc.c:379:13: warning: The left operand of '!=' is a garbage value [core.UndefinedBinaryOperatorResult] if (buf[0] != 'E' || buf[1] != 'C') { ~~~~~~ ^ The check depends on the side effect of the read. When the read fails or is short, a buf containing garbage could be mistaken as correct. Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20230110193611.3573777-1-trix@redhat.com
2023-01-06platform/chrome: cros_ec: Shutdown on EC PanicRob Barnes
When an EC panic is reported, attempt an orderly shutdown. Force a shutdown after a brief timeout if the orderly shutdown fails for any reason. Using the common hw_protection_shutdown utility function since an EC panic has the potential to cause hw damage. This is all best effort. EC should also force a hard reset after a short timeout. Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Prashant Malani <pmalani@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20230104011524.369764-3-robbarnes@google.com
2023-01-06platform/chrome: cros_ec: Poll EC log on EC panicRob Barnes
Add handler for CrOS EC panic events. When a panic is reported, immediately poll for EC log. This should result in the log leading to the EC panic being preserved. ACPI_NOTIFY_CROS_EC_PANIC is defined in coreboot at https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src/ec/google/chromeec/acpi/ec.asl Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Prashant Malani <pmalani@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20230104011524.369764-2-robbarnes@google.com
2022-11-14platform/chrome: cros_ec_lpc: Force synchronous probeBrian Norris
This reverts commit bd88b965ae8c ("platform/chrome: cros_ec_lpc: Mark PROBE_PREFER_ASYNCHRONOUS"), and then some. It has been reported that there are issues with 'cros-ec-keyb' devices that are children of this. As noted in the initial patch for its ACPI support (commit ba0f32141bc5 ("Input: cros_ec_keyb - handle x86 detachable/convertible Chromebooks")), it's possible to probe an ACPI child device before its parent is probed -- hence the need for EPROBE_DEFER. Unfortunately, poking your parent's dev_get_drvdata() isn't safe with asynchronous probe, as there's no locking, and the ordering is all wrong anyway (drvdata is set before the device is *really* ready). Because this parent/child relationship has known issues, let's go the other direction and force synchronous probe, until we resolve the issues. Possible solutions involve adding device links, so we ensure the child doesn't probe before the parent is done; or perhaps some other larger refactoring (auxiliary bus?). But that might take a little more effort and review, as there are many other potential sub-devices of cros_ec_lpc that could need patching. Note that we don't have the same problem for non-ACPI cros-ec hosts, like cros-ec-spi (commit 015e4b05c377 ("platform/chrome: cros_ec_spi: Set PROBE_PREFER_ASYNCHRONOUS")), because its sub-devices aren't created until cros_ec_register(), or they don't exist at all (e.g., FPMCU uses). Fixes: bd88b965ae8c ("platform/chrome: cros_ec_lpc: Mark PROBE_PREFER_ASYNCHRONOUS") Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20221111231302.3458191-1-briannorris@chromium.org
2022-11-02platform/chrome: cros_ec_lpc: Mark PROBE_PREFER_ASYNCHRONOUSBrian Norris
This takes on the order of 60ms to probe on some systems, so let it probe asynchronously. It shouldn't have any dependencies that aren't handled cleanly. Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20221101152132.v2.2.Ib1036816e77aba71ebc16b71f7615c55d054689c@changeid
2022-11-02platform/chrome: cros_ec_lpc: Move mec_init to device probeBrian Norris
Disregarding the weird global state hiding in this cros_ec_lpc_mec_*() stuff, it belongs in device probe. We shouldn't assume we can access hardware resources when the device isn't attached to the driver. Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20221101152132.v2.1.I0728421299079b104710c202d5d7095b2674fd8c@changeid
2022-11-01platform/chrome: cros_ec_lpc_mec: remove cros_ec_lpc_mec_destroy()Tzung-Bi Shih
It's pointless (and invalid) to destroy a statically allocated mutex in cros_ec_lpc_mec_destroy(). Let's remove it. Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Reviewed-by: Brian Norris <briannorris@chromium.org> Link: https://lore.kernel.org/r/20221031050657.3899359-1-tzungbi@kernel.org
2022-05-16platform/chrome: correct cros_ec_prepare_tx() usageTzung-Bi Shih
cros_ec_prepare_tx() returns either: - >= 0 for number of prepared bytes. - < 0 for -errno. Correct the comment and make sure all callers check the return code. Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220513044143.1045728-3-tzungbi@kernel.org
2022-05-03platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports firstDustin L. Howett
Some ChromeOS EC devices (such as the Framework Laptop) only map I/O ports 0x800-0x807. Making the larger reservation required by the non-MEC LPC (the 0xFF ports for the memory map, and the 0xFF ports for the parameter region) is non-viable on these devices. Since we probe the MEC EC first, we can get away with a smaller reservation that covers the MEC EC ports. If we fall back to classic LPC, we can grow the reservation to cover the memory map and the parameter region. cros_ec_lpc_probe also interacted with I/O ports 0x800-0x807 without a reservation. Restructuring the code to request the MEC LPC region first obviates the need to do so. Signed-off-by: Dustin L. Howett <dustin@howett.net> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220217165930.15081-3-dustin@howett.net
2022-05-03platform/chrome: cros_ec_lpcs: detect the Framework LaptopDustin L. Howett
The Framework Laptop identifies itself in DMI with manufacturer "Framework" and product "Laptop". Signed-off-by: Dustin L. Howett <dustin@howett.net> Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org> Link: https://lore.kernel.org/r/20220217165930.15081-2-dustin@howett.net
2022-02-09platform/chrome: cros_ec: Make cros_ec_unregister() return voidUwe Kleine-König
Up to now cros_ec_unregister() returns zero unconditionally. Make it return void instead which makes it easier to see in the callers that there is no error to handle. Also the return value of i2c, platform and spi remove callbacks is ignored anyway. Reviewed-by: Guenter Roeck <groeck@chromium.org> Link: https://lore.kernel.org/r/20211020071753.wltjslmimb6wtlp5@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220123175201.34839-5-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-09-30platform/chrome: cros_ec: Fix spelling mistake "responsed" -> "response"Colin Ian King
There are spelling mistakes in dev_warn messages. Fix them. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210925171743.173219-1-colin.king@canonical.com
2020-02-03platform/chrome: cros_ec: Match implementation with headersEnric Balletbo i Serra
The 'cros_ec' core driver is the common interface for the cros_ec transport drivers to do the shared operations to register, unregister, suspend, resume and handle_event. The interface is provided by including the header 'include/linux/platform_data/cros_ec_proto.h', however, instead of have the implementation of these functions in cros_ec_proto.c, it is in 'cros_ec.c', which is a different kernel module. Apart from being a bad practice, this can induce confusions allowing the users of the cros_ec protocol to call these functions. The register, unregister, suspend, resume and handle_event functions *should* only be called by the different transport drivers (i2c, spi, lpc, etc.), so make this a bit less confusing by moving these functions from the public in-kernel space to a private include in platform/chrome, and then, the interface for cros_ec module and for the cros_ec_proto module is clean. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2019-12-10platform/chrome: cros_ec_lpc: Use platform_get_irq_optional() for optional IRQsEnric Balletbo i Serra
As platform_get_irq() now prints an error when the interrupt does not exist, use platform_get_irq_optional() to get the IRQ which is optional to avoid below error message during probe: [ 5.113502] cros_ec_lpcs GOOG0004:00: IRQ index 0 not found Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org>
2019-11-21platform/chrome: cros_ec: handle MKBP more events flagEnrico Granata
The ChromeOS EC has support for signaling to the host that a single IRQ can serve multiple MKBP (Matrix KeyBoard Protocol) events. Doing this serves an optimization purpose, as it minimizes the number of round-trips into the interrupt handling machinery, and it proves beneficial to sensor timestamping as it keeps the desired synchronization of event times between the two processors. This patch adds kernel support for this EC feature, allowing the ec_irq to loop until all events have been served. Signed-off-by: Enrico Granata <egranata@chromium.org> Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2019-11-21platform/chrome: cros-ec: Record event timestamp in the hard irqGwendal Grignou
To improve sensor timestamp precision, given EC and AP are in different time domains, the AP needs to try to record the exact moment an event was signalled to the AP by the EC as soon as possible after it happens. First thing in the hard irq is the best place for this. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2019-09-02mfd / platform: cros_ec: Reorganize platform and mfd includesEnric Balletbo i Serra
There is a bit of mess between cros-ec mfd includes and platform includes. For example, we have a linux/mfd/cros_ec.h include that exports the interface implemented in platform/chrome/cros_ec_proto.c. Or we have a linux/mfd/cros_ec_commands.h file that is non related to the multifunction device (in the sense that is not exporting any function of the mfd device). This causes crossed includes between mfd and platform/chrome subsystems and makes the code difficult to read, apart from creating 'curious' situations where a platform/chrome driver includes a linux/mfd/cros_ec.h file just to get the exported functions that are implemented in another platform/chrome driver. In order to have a better separation on what the cros-ec multifunction driver does and what the cros-ec core provides move and rework the affected includes doing: - Move cros_ec_commands.h to include/linux/platform_data/cros_ec_commands.h - Get rid of the parts that are implemented in the platform/chrome/cros_ec_proto.c driver from include/linux/mfd/cros_ec.h to a new file include/linux/platform_data/cros_ec_proto.h - Update all the drivers with the new includes, so - Drivers that only need to know about the protocol include - linux/platform_data/cros_ec_proto.h - linux/platform_data/cros_ec_commands.h - Drivers that need to know about the cros-ec mfd device also include - linux/mfd/cros_ec.h Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Series changes: 3 - Fix dereferencing pointer to incomplete type 'struct cros_ec_dev' (lkp) Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-09-02mfd / platform: cros_ec: Handle chained ECs as platform devicesEnric Balletbo i Serra
An MFD is a device that contains several sub-devices (cells). For instance, the ChromeOS EC fits in this description as usually contains a charger and can have other devices with different functions like a Real-Time Clock, an Audio codec, a Real-Time Clock, ... If you look at the driver, though, we're doing something odd. We have two MFD cros-ec drivers where one of them (cros-ec-core) instantiates another MFD driver as sub-driver (cros-ec-dev), and the latest instantiates the different sub-devices (Real-Time Clock, Audio codec, etc). MFD ------------------------------------------ cros-ec-core |___ mfd-cellA (cros-ec-dev) | |__ mfd-cell0 | |__ mfd-cell1 | |__ ... | |___ mfd-cellB (cros-ec-dev) |__ mfd-cell0 |__ mfd-cell1 |__ ... The problem that was trying to solve is to describe some kind of topology for the case where we have an EC (cros-ec) chained with another EC (cros-pd). Apart from that this extends the bounds of what MFD was designed to do we might be interested on have other kinds of topology that can't be implemented in that way. Let's prepare the code to move the cros-ec-core part from MFD to platform/chrome as this is clearly a platform specific thing non-related to a MFD device. platform/chrome | MFD ------------------------------------------ | cros-ec ________|___ cros-ec-dev | |__ mfd-cell0 | |__ mfd-cell1 | |__ ... | cros-pd ________|___ cros-ec-dev | |__ mfd-cell0 | |__ mfd-cell1 | |__ ... Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-06-20platform/chrome: cros_ec_lpc: Choose Microchip EC at runtimeEnric Balletbo i Serra
On many boards, communication between the kernel and the Embedded Controller happens over an LPC bus. In these cases, the kernel config CONFIG_CROS_EC_LPC is enabled. Some of these LPC boards contain a Microchip Embedded Controller (MEC) that is different from the regular EC. On these devices, the same LPC bus is used, but the protocol is a little different. In these cases, the CONFIG_CROS_EC_LPC_MEC kernel config is enabled. Currently, the kernel decides at compile-time whether or not to use the MEC variant, and, when that kernel option is selected it breaks the other boards. We would like a kind of runtime detection to avoid this. This patch adds that detection mechanism by probing the protocol at runtime, first we assume that a MEC variant is connected, and if the protocol fails it fallbacks to the regular EC. This adds a bit of overload because we try to read twice on those LPC boards that doesn't contain a MEC variant, but is a better solution than having to select the EC variant at compile-time. While here also fix the alignment in Kconfig file for this config option replacing the spaces by tabs. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Nick Crews <ncrews@chromium.org> Reviewed-by: Nick Crews <ncrews@chromium.org>
2019-06-20platform/chrome: cros_ec_lpc: Merge cros_ec_lpc and cros_ec_lpc_regEnric Balletbo i Serra
The cros_ec_lpc_reg files are only used by the cros_ec_lpc core and there isn't logical separation between them. So, merge those files into the cros_ec_lpc also allowing us to drop the header file used for the interface between the two. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Nick Crews <ncrews@chromium.org>
2019-06-05platform/chrome: cros_ec: Make some symbols staticYueHaibing
Fix sparse warning: drivers/platform/chrome/cros_ec_debugfs.c:256:30: warning: symbol 'cros_ec_console_log_fops' was not declared. Should it be static? drivers/platform/chrome/cros_ec_debugfs.c:265:30: warning: symbol 'cros_ec_pdinfo_fops' was not declared. Should it be static? drivers/platform/chrome/cros_ec_lightbar.c:550:24: warning: symbol 'cros_ec_lightbar_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_sysfs.c:338:24: warning: symbol 'cros_ec_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_vbc.c:104:24: warning: symbol 'cros_ec_vbc_attr_group' was not declared. Should it be static? drivers/platform/chrome/cros_ec_lpc.c:408:25: warning: symbol 'cros_ec_lpc_pm_ops' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Benson Leung <bleung@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2019-02-01platform/chrome: cros_ec_lpc: switch to SPDX identifierEnric Balletbo i Serra
Adopt the SPDX license identifier headers to ease license compliance management. Also remove the license boiler-plate and redundant driver description. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org>
2019-02-01mfd / platform: cros_ec: Use devm_mfd_add_devicesEnric Balletbo i Serra
Use devm_mfd_add_devices() for adding cros-ec core MFD child devices. This reduces the need of remove callback from platform/chrome for removing the MFD child devices. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2018-10-09platform/chrome: Add a new interrupt path for cros_ec_lpcEnrico Granata
This commit allows cros_ec_lpc to register a direct IRQ instead of relying on the ACPI notification chain to receive MKBP events. This change is done in the interest of allowing reduced jitter in the communication path between the CrOS EC and the host for receiving sensor data. Signed-off-by: Enrico Granata <egranata@chromium.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2018-09-07platform/chrome: Move mfd/cros_ec_lpc* includes to drivers/platform.Enric Balletbo i Serra
The cros-ec-lpc driver lives in drivers/platform because is platform specific, however there are two includes (cros_ec_lpc_mec.h and cros_ec_lpc_reg.h) that lives in include/linux/mfd. These two includes are only used for the platform driver and are not really related to the MFD subsystem, so move the includes from include/linux/mfd to drivers/platform/chrome. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2018-05-22platform/chrome: cros_ec_lpc: do not try DMI match when ACPI device foundDmitry Torokhov
Older models of Chromebooks did not describe the LPC EC in their ACPI tables; starting with Strago-based devices Google is using GOOG0004 device to describe EC LPC. DMI-based match is fragile and does not work reliably, especially when using custom firmware. It is also not needed when we can locate the right ACPI device, so let's stop bailing out when DMI does not match but the right ACPI device is present. Cc: stable@vger.kernel.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2018-04-09platform/chrome: cros_ec_lpc: Add support for Google devices using custom ↵Salvatore Bellizzi
coreboot firmware This patch adds generic device information to the DMI table of the cros_ec_lpc driver, needed for Chromebooks/boxes using a custom coreboot firmware. The DMI info would not contain "Google_*" as BIOS version string, instead the system vendor string would still be "GOOGLE", so this seems to be a reasonable match for every Chromebook/box running a custom firmware. Signed-off-by: Salvatore Bellizzi <lkml@seppia.net> Signed-off-by: Vittorio Gambaletta <linuxbugs@vittgam.net> Signed-off-by: Benson Leung <bleung@chromium.org>
2018-04-09platform/chrome: cros_ec_lpc: wake up from s2idle on Chrome ECWenkai Du
Chrome platform installed a Chrome EC notify handler which prevents default EC GPE handler getting called. Add pm_system_wakeup to the Chrome EC notify handler so wake up from s2idle can happen. Suggested-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Wenkai Du <wenkai.du@intel.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-12-17platform/chrome: cros_ec_lpc: Add support for Google GlimmerThierry Escande
This patch adds device information to the DMI table of the cros_ec_lpc driver for Google Glimmer devices. Since Google BIOS does not enumerate devices in the LPC bus, the cros_ec_lpc driver checks for system compatibility and registers the cros_ec device itself. Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-12-17platform/chrome: cros_ec_lpc: Register the driver if ACPI entry is missing.Enric Balletbo i Serra
Commit 12278dc7c572 ("platform/chrome: cros_ec_lpc: Add support for GOOG004 ACPI device") added support when the firmware reports the ACPI device, there are some firmwares though that doesn't report this device but have it. In such cases we need to instantiate the driver explicitly if it is not instantiated through ACPI. Fixes: 12278dc7c572 ("platform/chrome: cros_ec_lpc: Add support for GOOG004 ACPI device") Signed-off-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-12-17platform/chrome: cros_ec_lpc: remove redundant pointer requestColin Ian King
Pointer request is being assigned but never used, so remove it. Cleans up the clang warning: drivers/platform/chrome/cros_ec_lpc.c:68:2: warning: Value stored to 'request' is never read Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-09-14dmi: Mark all struct dmi_system_id instances constChristoph Hellwig
... and __initconst if applicable. Based on similar work for an older kernel in the Grsecurity patch. [JD: fix toshiba-wmi build] [JD: add htcpen] [JD: move __initconst where checkscript wants it] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jean Delvare <jdelvare@suse.de>
2017-06-27cros_ec: Don't signal wake event for non-wake host eventsShawn Nematbakhsh
The subset of wake-enabled host events is defined by the EC, but the EC may still send non-wake host events if we're in the process of suspending. Get the mask of wake-enabled host events from the EC and filter out non-wake events to prevent spurious aborted suspend attempts. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-06-23platform/chrome: cros_ec_lpc: Add MKBP events support over ACPIGwendal Grignou
This patch installs a notify handler to process MKBP events for EC firmware directing them over ACPI. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-06-23platform/chrome: cros_ec_lpc: Add power management opsArchana Patni
This patch adds suspend and resume pm ops to the LPC ChromeOS EC driver. These LPC handlers call the croc_ec generic handlers. Signed-off-by: Archana Patni <archana.patni@intel.com> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-06-23platform/chrome: cros_ec_lpc: Add support for GOOG004 ACPI deviceGwendal Grignou
This patch removes platform_device_register() call and adds an ACPI device id structure. The driver is now automatically probed for devices with a GOOG0004 ACPI entry. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-06-23platform/chrome: cros_ec_lpc: Add support for mec1322 ECShawn Nematbakhsh
This adds support for the ChromeOS LPC Microchip Embedded Controller (mec1322) variant. mec1322 accesses I/O region [800h, 9ffh] through embedded memory interface (EMI) rather than LPC. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2017-06-23platform/chrome: cros_ec_lpc: Add R/W helpers to LPC protocol variantsShawn Nematbakhsh
Call common functions for read / write to prepare support for future LPC protocol variants which use different I/O ops than inb / outb. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Thierry Escande <thierry.escande@collabora.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Benson Leung <bleung@chromium.org>
2015-10-07platform/chrome: cros_ec_lpc - Add support for Google Pixel 2Javier Martinez Canillas
Since the verion of ACPI in Google BIOS does not enumerate the devices in the LPC bus, the cros_ec_lpc driver resorts to DMI data to check if a system is supported by the driver and autoload if built as a module. Add information about the Google Pixel 2 to the DMI device table. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-07platform/chrome: cros_ec_lpc - Use existing function to check EC resultJavier Martinez Canillas
Commit 6db07b633658 ("mfd: cros_ec: Check result code from EC messages") added a common cros_ec_check_result() function that can be used to check the ec_msg->result for errors and warns about them. Use the existing function instead of duplicating same check in the driver. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2015-06-15mfd: cros_ec: Support multiple EC in a systemGwendal Grignou
Chromebooks can have more than one Embedded Controller so the cros_ec device id has to be incremented for each EC registered. Add a new structure to represent multiple EC as different char devices (e.g: /dev/cros_ec, /dev/cros_pd). It connects to cros_ec_device and allows sysfs inferface for cros_pd. Also reduce number of allocated objects, make chromeos sysfs class object a static and add refcounting to prevent object deletion while command is in progress. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-06-15mfd: cros_ec: add bus-specific proto v3 codeStephen Barber
Add proto v3 support to the SPI, I2C, and LPC. Signed-off-by: Stephen Barber <smbarber@chromium.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-06-15mfd: cros_ec: add proto v3 skeletonStephen Barber
Add support in cros_ec.c to handle EC host command protocol v3. For v3+, probe for maximum shared protocol version and max request, response, and passthrough sizes. For now, this will always fall back to v2, since there is no bus-specific code for handling proto v3 packets. Signed-off-by: Stephen Barber <smbarber@chromium.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-06-15mfd: cros_ec: Use a zero-length array for command dataJavier Martinez Canillas
Commit 1b84f2a4cd4a ("mfd: cros_ec: Use fixed size arrays to transfer data with the EC") modified the struct cros_ec_command fields to not use pointers for the input and output buffers and use fixed length arrays instead. This change was made because the cros_ec ioctl API uses that struct cros_ec_command to allow user-space to send commands to the EC and to get data from the EC. So using pointers made the API not 64-bit safe. Unfortunately this approach was not flexible enough for all the use-cases since there may be a need to send larger commands on newer versions of the EC command protocol. So to avoid to choose a constant length that it may be too big for most commands and thus wasting memory and CPU cycles on copy from and to user-space or having a size that is too small for some big commands, use a zero-length array that is both 64-bit safe and flexible. The same buffer is used for both output and input data so the maximum of these values should be used to allocate it. Suggested-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-06-15mfd: cros_ec: Remove parent fieldGwendal Grignou
Parent and device were pointing to the same device structure. Parent is unused, removed. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Stephen Barber <smbarber@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Puthikorn Voravootivat <puthik@chromium.org> Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Lee Jones <lee.jones@linaro.org>